VirtualBox

Ticket #9084: vboxlog.txt

File vboxlog.txt, 123.0 KB (added by Ossama, 13 years ago)

As requested, the first 2000 lines of the log file

Line 
100:00:00.371 VirtualBox 4.0.8 r71778 win.amd64 (May 16 2011 18:32:27) release log
200:00:00.371 Log opened 2011-06-16T19:34:42.728977000Z
300:00:00.371 OS Product: Windows 7
400:00:00.371 OS Release: 6.1.7600
500:00:00.371 OS Service Pack:
600:00:00.393 DMI Product Name: QOSMIO X500
700:00:00.398 DMI Product Version: PQX33E-06H00PAR
800:00:00.400 Host RAM: 8180MB RAM, available: 5400MB
900:00:00.400 Executable: F:\VMVIRT~1\VirtualBox.exe
1000:00:00.400 Process ID: 6480
1100:00:00.400 Package type: WINDOWS_64BITS_GENERIC
1200:00:00.408 SUP: Loaded VMMR0.r0 (F:\VMVIRT~1\VMMR0.r0) at 0xfffff8800bc00000 - ModuleInit at fffff8800bc14ab0 and ModuleTerm at fffff8800bc14b30 using the native ring-0 loader
1300:00:00.408 SUP: VMMR0EntryEx located at fffff8800bc15be0, VMMR0EntryFast at fffff8800bc14cd0 and VMMR0EntryInt at fffff8800bc14cc0
1400:00:00.408 SUP: windbg> .reload /f F:\VMVIRT~1\VMMR0.r0=0xfffff8800bc00000
1500:00:00.417 Using MWAIT extensions
1600:00:00.437 File system of 'C:\Users\HC80\VirtualBox VMs\WM\Snapshots' (snapshots) is unknown
1700:00:00.437 File system of 'C:\Users\HC80\VirtualBox VMs\WM\WM.vdi' is ntfs
1800:00:00.469 VBoxSharedClipboard mode: Bidirectional
1900:00:00.472 ************************* CFGM dump *************************
2000:00:00.472 [/] (level 0)
2100:00:00.472 CSAMEnabled <integer> = 0x0000000000000001 (1)
2200:00:00.472 CpuExecutionCap <integer> = 0x0000000000000064 (100)
2300:00:00.472 EnablePAE <integer> = 0x0000000000000001 (1)
2400:00:00.472 HwVirtExtForced <integer> = 0x0000000000000000 (0)
2500:00:00.472 MemBalloonSize <integer> = 0x0000000000000000 (0)
2600:00:00.472 Name <string> = "WM" (cb=3)
2700:00:00.472 NumCPUs <integer> = 0x0000000000000001 (1)
2800:00:00.472 PATMEnabled <integer> = 0x0000000000000001 (1)
2900:00:00.472 PageFusion <integer> = 0x0000000000000000 (0)
3000:00:00.472 RamHoleSize <integer> = 0x0000000024000000 (603979776)
3100:00:00.472 RamSize <integer> = 0x0000000080000000 (2147483648)
3200:00:00.472 RawR0Enabled <integer> = 0x0000000000000001 (1)
3300:00:00.472 RawR3Enabled <integer> = 0x0000000000000001 (1)
3400:00:00.472 TimerMillies <integer> = 0x000000000000000a (10)
3500:00:00.472 UUID <bytes> = "35 8a 9c 87 62 d7 32 45 b7 46 65 00 f3 5c ed 75" (cb=16)
3600:00:00.472
3700:00:00.472 [/CPUM/] (level 1)
3800:00:00.472 MWaitExtensions <integer> = 0x0000000000000001 (1)
3900:00:00.472 SyntheticCpu <integer> = 0x0000000000000000 (0)
4000:00:00.472
4100:00:00.472 [/Devices/] (level 1)
4200:00:00.472
4300:00:00.472 [/Devices/8237A/] (level 2)
4400:00:00.472
4500:00:00.472 [/Devices/8237A/0/] (level 3)
4600:00:00.472 Trusted <integer> = 0x0000000000000001 (1)
4700:00:00.472
4800:00:00.472 [/Devices/AudioSniffer/] (level 2)
4900:00:00.472
5000:00:00.472 [/Devices/AudioSniffer/0/] (level 3)
5100:00:00.472
5200:00:00.472 [/Devices/AudioSniffer/0/Config/] (level 4)
5300:00:00.472
5400:00:00.472 [/Devices/AudioSniffer/0/LUN#0/] (level 4)
5500:00:00.472 Driver <string> = "MainAudioSniffer" (cb=17)
5600:00:00.472
5700:00:00.472 [/Devices/AudioSniffer/0/LUN#0/Config/] (level 5)
5800:00:00.472 Object <integer> = 0x00000000009727c0 (9906112)
5900:00:00.472
6000:00:00.472 [/Devices/VMMDev/] (level 2)
6100:00:00.472
6200:00:00.472 [/Devices/VMMDev/0/] (level 3)
6300:00:00.472 PCIBusNo <integer> = 0x0000000000000000 (0)
6400:00:00.472 PCIDeviceNo <integer> = 0x0000000000000004 (4)
6500:00:00.472 PCIFunctionNo <integer> = 0x0000000000000000 (0)
6600:00:00.472 Trusted <integer> = 0x0000000000000001 (1)
6700:00:00.472
6800:00:00.472 [/Devices/VMMDev/0/Config/] (level 4)
6900:00:00.472 GuestCoreDumpDir <string> = "C:\Users\HC80\VirtualBox VMs\WM\Snapshots" (cb=42)
7000:00:00.472 RamSize <integer> = 0x0000000080000000 (2147483648)
7100:00:00.472
7200:00:00.472 [/Devices/VMMDev/0/LUN#0/] (level 4)
7300:00:00.472 Driver <string> = "HGCM" (cb=5)
7400:00:00.472
7500:00:00.472 [/Devices/VMMDev/0/LUN#0/Config/] (level 5)
7600:00:00.472 Object <integer> = 0x00000000041b6c60 (68906080)
7700:00:00.472
7800:00:00.472 [/Devices/VMMDev/0/LUN#999/] (level 4)
7900:00:00.472 Driver <string> = "MainStatus" (cb=11)
8000:00:00.472
8100:00:00.472 [/Devices/VMMDev/0/LUN#999/Config/] (level 5)
8200:00:00.472 First <integer> = 0x0000000000000000 (0)
8300:00:00.472 Last <integer> = 0x0000000000000000 (0)
8400:00:00.472 papLeds <integer> = 0x0000000003129b78 (51551096)
8500:00:00.472
8600:00:00.472 [/Devices/acpi/] (level 2)
8700:00:00.472
8800:00:00.472 [/Devices/acpi/0/] (level 3)
8900:00:00.472 PCIBusNo <integer> = 0x0000000000000000 (0)
9000:00:00.472 PCIDeviceNo <integer> = 0x0000000000000007 (7)
9100:00:00.472 PCIFunctionNo <integer> = 0x0000000000000000 (0)
9200:00:00.472 Trusted <integer> = 0x0000000000000001 (1)
9300:00:00.472
9400:00:00.472 [/Devices/acpi/0/Config/] (level 4)
9500:00:00.472 AudioPciAddress <integer> = 0x0000000000050000 (327680)
9600:00:00.472 CpuHotPlug <integer> = 0x0000000000000000 (0)
9700:00:00.472 FdcEnabled <integer> = 0x0000000000000000 (0)
9800:00:00.472 HostBusPciAddress <integer> = 0x00000000001e0000 (1966080)
9900:00:00.472 HpetEnabled <integer> = 0x0000000000000001 (1)
10000:00:00.472 IOAPIC <integer> = 0x0000000000000001 (1)
10100:00:00.472 IocPciAddress <integer> = 0x00000000001f0000 (2031616)
10200:00:00.472 McfgBase <integer> = 0x00000000dc000000 (3690987520)
10300:00:00.472 McfgLength <integer> = 0x0000000004000000 (67108864)
10400:00:00.472 NicPciAddress <integer> = 0x0000000000030000 (196608)
10500:00:00.472 NumCPUs <integer> = 0x0000000000000001 (1)
10600:00:00.472 RamHoleSize <integer> = 0x0000000024000000 (603979776)
10700:00:00.472 RamSize <integer> = 0x0000000080000000 (2147483648)
10800:00:00.472 ShowCpu <integer> = 0x0000000000000001 (1)
10900:00:00.472 ShowRtc <integer> = 0x0000000000000001 (1)
11000:00:00.472 SmcEnabled <integer> = 0x0000000000000001 (1)
11100:00:00.472
11200:00:00.472 [/Devices/acpi/0/LUN#0/] (level 4)
11300:00:00.472 Driver <string> = "ACPIHost" (cb=9)
11400:00:00.472
11500:00:00.472 [/Devices/acpi/0/LUN#0/Config/] (level 5)
11600:00:00.472
11700:00:00.472 [/Devices/ahci/] (level 2)
11800:00:00.472
11900:00:00.472 [/Devices/ahci/0/] (level 3)
12000:00:00.472 PCIBusNo <integer> = 0x0000000000000000 (0)
12100:00:00.472 PCIDeviceNo <integer> = 0x000000000000001f (31)
12200:00:00.472 PCIFunctionNo <integer> = 0x0000000000000002 (2)
12300:00:00.472 Trusted <integer> = 0x0000000000000001 (1)
12400:00:00.472
12500:00:00.472 [/Devices/ahci/0/Config/] (level 4)
12600:00:00.472 Bootable <integer> = 0x0000000000000001 (1)
12700:00:00.472 PortCount <integer> = 0x0000000000000001 (1)
12800:00:00.472 PrimaryMaster <integer> = 0x0000000000000000 (0)
12900:00:00.472 PrimarySlave <integer> = 0x0000000000000001 (1)
13000:00:00.472 SecondaryMaster <integer> = 0x0000000000000002 (2)
13100:00:00.472 SecondarySlave <integer> = 0x0000000000000003 (3)
13200:00:00.472
13300:00:00.472 [/Devices/ahci/0/LUN#0/] (level 4)
13400:00:00.472 Driver <string> = "Block" (cb=6)
13500:00:00.472
13600:00:00.472 [/Devices/ahci/0/LUN#0/AttachedDriver/] (level 5)
13700:00:00.472 Driver <string> = "VD" (cb=3)
13800:00:00.472
13900:00:00.472 [/Devices/ahci/0/LUN#0/AttachedDriver/Config/] (level 6)
14000:00:00.472 BlockCache <integer> = 0x0000000000000001 (1)
14100:00:00.472 Format <string> = "VDI" (cb=4)
14200:00:00.472 Path <string> = "C:\Users\HC80\VirtualBox VMs\WM\WM.vdi" (cb=39)
14300:00:00.472 Type <string> = "HardDisk" (cb=9)
14400:00:00.472 UseNewIo <integer> = 0x0000000000000001 (1)
14500:00:00.472
14600:00:00.472 [/Devices/ahci/0/LUN#0/Config/] (level 5)
14700:00:00.472 Mountable <integer> = 0x0000000000000000 (0)
14800:00:00.472 Type <string> = "HardDisk" (cb=9)
14900:00:00.472
15000:00:00.472 [/Devices/ahci/0/LUN#999/] (level 4)
15100:00:00.472 Driver <string> = "MainStatus" (cb=11)
15200:00:00.472
15300:00:00.472 [/Devices/ahci/0/LUN#999/Config/] (level 5)
15400:00:00.472 First <integer> = 0x0000000000000000 (0)
15500:00:00.472 Last <integer> = 0x0000000000000000 (0)
15600:00:00.472 papLeds <integer> = 0x0000000003129988 (51550600)
15700:00:00.472
15800:00:00.472 [/Devices/apic/] (level 2)
15900:00:00.472
16000:00:00.472 [/Devices/apic/0/] (level 3)
16100:00:00.472 Trusted <integer> = 0x0000000000000001 (1)
16200:00:00.472
16300:00:00.472 [/Devices/apic/0/Config/] (level 4)
16400:00:00.472 IOAPIC <integer> = 0x0000000000000001 (1)
16500:00:00.472 NumCPUs <integer> = 0x0000000000000001 (1)
16600:00:00.472
16700:00:00.472 [/Devices/e1000/] (level 2)
16800:00:00.472
16900:00:00.472 [/Devices/e1000/0/] (level 3)
17000:00:00.472 PCIBusNo <integer> = 0x0000000000000000 (0)
17100:00:00.472 PCIDeviceNo <integer> = 0x0000000000000003 (3)
17200:00:00.472 PCIFunctionNo <integer> = 0x0000000000000000 (0)
17300:00:00.472 Trusted <integer> = 0x0000000000000001 (1)
17400:00:00.472
17500:00:00.472 [/Devices/e1000/0/Config/] (level 4)
17600:00:00.472 AdapterType <integer> = 0x0000000000000001 (1)
17700:00:00.472 CableConnected <integer> = 0x0000000000000001 (1)
17800:00:00.472 LineSpeed <integer> = 0x0000000000000000 (0)
17900:00:00.472 MAC <bytes> = "08 00 27 db 7f 9e" (cb=6)
18000:00:00.472
18100:00:00.472 [/Devices/e1000/0/LUN#0/] (level 4)
18200:00:00.472 Driver <string> = "NAT" (cb=4)
18300:00:00.472
18400:00:00.472 [/Devices/e1000/0/LUN#0/Config/] (level 5)
18500:00:00.472 AliasMode <integer> = 0x0000000000000000 (0)
18600:00:00.472 BootFile <string> = "WM.pxe" (cb=7)
18700:00:00.472 DNSProxy <integer> = 0x0000000000000000 (0)
18800:00:00.472 Network <string> = "10.0.2.0/24" (cb=12)
18900:00:00.472 PassDomain <integer> = 0x0000000000000001 (1)
19000:00:00.472 TFTPPrefix <string> = "C:\Users\HC80/.VirtualBox\TFTP" (cb=31)
19100:00:00.472 UseHostResolver <integer> = 0x0000000000000000 (0)
19200:00:00.472
19300:00:00.472 [/Devices/e1000/0/LUN#999/] (level 4)
19400:00:00.472 Driver <string> = "MainStatus" (cb=11)
19500:00:00.472
19600:00:00.472 [/Devices/e1000/0/LUN#999/Config/] (level 5)
19700:00:00.472 papLeds <integer> = 0x0000000003129b38 (51551032)
19800:00:00.472
19900:00:00.472 [/Devices/hda/] (level 2)
20000:00:00.472
20100:00:00.472 [/Devices/hda/0/] (level 3)
20200:00:00.472 PCIBusNo <integer> = 0x0000000000000000 (0)
20300:00:00.472 PCIDeviceNo <integer> = 0x0000000000000005 (5)
20400:00:00.472 PCIFunctionNo <integer> = 0x0000000000000000 (0)
20500:00:00.472 Trusted <integer> = 0x0000000000000001 (1)
20600:00:00.472
20700:00:00.472 [/Devices/hda/0/Config/] (level 4)
20800:00:00.472
20900:00:00.472 [/Devices/hda/0/LUN#0/] (level 4)
21000:00:00.472 Driver <string> = "AUDIO" (cb=6)
21100:00:00.472
21200:00:00.472 [/Devices/hda/0/LUN#0/Config/] (level 5)
21300:00:00.472 AudioDriver <string> = "dsound" (cb=7)
21400:00:00.472 StreamName <string> = "WM" (cb=3)
21500:00:00.472
21600:00:00.472 [/Devices/hpet/] (level 2)
21700:00:00.472
21800:00:00.472 [/Devices/hpet/0/] (level 3)
21900:00:00.472 Trusted <integer> = 0x0000000000000001 (1)
22000:00:00.472
22100:00:00.472 [/Devices/i8254/] (level 2)
22200:00:00.472
22300:00:00.472 [/Devices/i8254/0/] (level 3)
22400:00:00.472
22500:00:00.472 [/Devices/i8254/0/Config/] (level 4)
22600:00:00.472
22700:00:00.472 [/Devices/i8259/] (level 2)
22800:00:00.472
22900:00:00.472 [/Devices/i8259/0/] (level 3)
23000:00:00.472 Trusted <integer> = 0x0000000000000001 (1)
23100:00:00.472
23200:00:00.472 [/Devices/i8259/0/Config/] (level 4)
23300:00:00.472
23400:00:00.472 [/Devices/ich9pci/] (level 2)
23500:00:00.472
23600:00:00.472 [/Devices/ich9pci/0/] (level 3)
23700:00:00.472 Trusted <integer> = 0x0000000000000001 (1)
23800:00:00.472
23900:00:00.472 [/Devices/ich9pci/0/Config/] (level 4)
24000:00:00.472 IOAPIC <integer> = 0x0000000000000001 (1)
24100:00:00.472 McfgBase <integer> = 0x00000000dc000000 (3690987520)
24200:00:00.472 McfgLength <integer> = 0x0000000004000000 (67108864)
24300:00:00.472
24400:00:00.472 [/Devices/ich9pcibridge/] (level 2)
24500:00:00.472
24600:00:00.472 [/Devices/ich9pcibridge/0/] (level 3)
24700:00:00.472 PCIBusNo <integer> = 0x0000000000000000 (0)
24800:00:00.472 PCIDeviceNo <integer> = 0x0000000000000018 (24)
24900:00:00.472 PCIFunctionNo <integer> = 0x0000000000000000 (0)
25000:00:00.472 Trusted <integer> = 0x0000000000000001 (1)
25100:00:00.472
25200:00:00.472 [/Devices/ich9pcibridge/1/] (level 3)
25300:00:00.472 PCIBusNo <integer> = 0x0000000000000000 (0)
25400:00:00.472 PCIDeviceNo <integer> = 0x0000000000000019 (25)
25500:00:00.472 PCIFunctionNo <integer> = 0x0000000000000000 (0)
25600:00:00.472 Trusted <integer> = 0x0000000000000001 (1)
25700:00:00.472
25800:00:00.472 [/Devices/ioapic/] (level 2)
25900:00:00.472
26000:00:00.472 [/Devices/ioapic/0/] (level 3)
26100:00:00.472 Trusted <integer> = 0x0000000000000001 (1)
26200:00:00.472
26300:00:00.472 [/Devices/ioapic/0/Config/] (level 4)
26400:00:00.472
26500:00:00.472 [/Devices/lpc/] (level 2)
26600:00:00.472
26700:00:00.472 [/Devices/lpc/0/] (level 3)
26800:00:00.472 PCIBusNo <integer> = 0x0000000000000000 (0)
26900:00:00.472 PCIDeviceNo <integer> = 0x000000000000001f (31)
27000:00:00.472 PCIFunctionNo <integer> = 0x0000000000000000 (0)
27100:00:00.472 Trusted <integer> = 0x0000000000000001 (1)
27200:00:00.472
27300:00:00.472 [/Devices/mc146818/] (level 2)
27400:00:00.472
27500:00:00.472 [/Devices/mc146818/0/] (level 3)
27600:00:00.472
27700:00:00.472 [/Devices/mc146818/0/Config/] (level 4)
27800:00:00.472 UseUTC <integer> = 0x0000000000000000 (0)
27900:00:00.472
28000:00:00.472 [/Devices/parallel/] (level 2)
28100:00:00.472
28200:00:00.472 [/Devices/pcarch/] (level 2)
28300:00:00.472
28400:00:00.472 [/Devices/pcarch/0/] (level 3)
28500:00:00.472 Trusted <integer> = 0x0000000000000001 (1)
28600:00:00.472
28700:00:00.472 [/Devices/pcarch/0/Config/] (level 4)
28800:00:00.472
28900:00:00.472 [/Devices/pcbios/] (level 2)
29000:00:00.472
29100:00:00.472 [/Devices/pcbios/0/] (level 3)
29200:00:00.472 Trusted <integer> = 0x0000000000000001 (1)
29300:00:00.472
29400:00:00.472 [/Devices/pcbios/0/Config/] (level 4)
29500:00:00.472 BootDevice0 <string> = "FLOPPY" (cb=7)
29600:00:00.472 BootDevice1 <string> = "DVD" (cb=4)
29700:00:00.472 BootDevice2 <string> = "IDE" (cb=4)
29800:00:00.472 BootDevice3 <string> = "NONE" (cb=5)
29900:00:00.472 FloppyDevice <string> = "i82078" (cb=7)
30000:00:00.472 HardDiskDevice <string> = "piix3ide" (cb=9)
30100:00:00.472 IOAPIC <integer> = 0x0000000000000001 (1)
30200:00:00.472 LanBootRom <string> = "F:\VMVIRT~1/ExtensionPacks/Oracle_VM_VirtualBox_Extension_Pack/PXE-Intel.rom" (cb=77)
30300:00:00.472 McfgBase <integer> = 0x00000000dc000000 (3690987520)
30400:00:00.472 McfgLength <integer> = 0x0000000004000000 (67108864)
30500:00:00.472 NumCPUs <integer> = 0x0000000000000001 (1)
30600:00:00.472 PXEDebug <integer> = 0x0000000000000000 (0)
30700:00:00.472 RamHoleSize <integer> = 0x0000000024000000 (603979776)
30800:00:00.472 RamSize <integer> = 0x0000000080000000 (2147483648)
30900:00:00.472 SataHardDiskDevice <string> = "ahci" (cb=5)
31000:00:00.472 SataPrimaryMasterLUN <integer> = 0x0000000000000000 (0)
31100:00:00.472 SataPrimarySlaveLUN <integer> = 0x0000000000000001 (1)
31200:00:00.472 SataSecondaryMasterLUN <integer> = 0x0000000000000002 (2)
31300:00:00.472 SataSecondarySlaveLUN <integer> = 0x0000000000000003 (3)
31400:00:00.472 UUID <bytes> = "35 8a 9c 87 62 d7 32 45 b7 46 65 00 f3 5c ed 75" (cb=16)
31500:00:00.472
31600:00:00.472 [/Devices/pcbios/0/Config/NetBoot/] (level 5)
31700:00:00.472
31800:00:00.472 [/Devices/pcbios/0/Config/NetBoot/0/] (level 6)
31900:00:00.472 NIC <integer> = 0x0000000000000000 (0)
32000:00:00.472 PCIBusNo <integer> = 0x0000000000000000 (0)
32100:00:00.472 PCIDeviceNo <integer> = 0x0000000000000003 (3)
32200:00:00.472 PCIFunctionNo <integer> = 0x0000000000000000 (0)
32300:00:00.472
32400:00:00.472 [/Devices/pckbd/] (level 2)
32500:00:00.472
32600:00:00.472 [/Devices/pckbd/0/] (level 3)
32700:00:00.472 Trusted <integer> = 0x0000000000000001 (1)
32800:00:00.472
32900:00:00.472 [/Devices/pckbd/0/Config/] (level 4)
33000:00:00.472
33100:00:00.472 [/Devices/pckbd/0/LUN#0/] (level 4)
33200:00:00.472 Driver <string> = "KeyboardQueue" (cb=14)
33300:00:00.472
33400:00:00.472 [/Devices/pckbd/0/LUN#0/AttachedDriver/] (level 5)
33500:00:00.472 Driver <string> = "MainKeyboard" (cb=13)
33600:00:00.472
33700:00:00.472 [/Devices/pckbd/0/LUN#0/AttachedDriver/Config/] (level 6)
33800:00:00.472 Object <integer> = 0x0000000003129eb0 (51551920)
33900:00:00.472
34000:00:00.472 [/Devices/pckbd/0/LUN#0/Config/] (level 5)
34100:00:00.472 QueueSize <integer> = 0x0000000000000040 (64)
34200:00:00.472
34300:00:00.472 [/Devices/pckbd/0/LUN#1/] (level 4)
34400:00:00.472 Driver <string> = "MouseQueue" (cb=11)
34500:00:00.472
34600:00:00.472 [/Devices/pckbd/0/LUN#1/AttachedDriver/] (level 5)
34700:00:00.472 Driver <string> = "MainMouse" (cb=10)
34800:00:00.472
34900:00:00.472 [/Devices/pckbd/0/LUN#1/AttachedDriver/Config/] (level 6)
35000:00:00.472 Object <integer> = 0x0000000000972b50 (9907024)
35100:00:00.472
35200:00:00.472 [/Devices/pckbd/0/LUN#1/Config/] (level 5)
35300:00:00.472 QueueSize <integer> = 0x0000000000000080 (128)
35400:00:00.472
35500:00:00.472 [/Devices/pcnet/] (level 2)
35600:00:00.472
35700:00:00.472 [/Devices/piix3ide/] (level 2)
35800:00:00.472
35900:00:00.472 [/Devices/piix3ide/0/] (level 3)
36000:00:00.472 PCIBusNo <integer> = 0x0000000000000000 (0)
36100:00:00.472 PCIDeviceNo <integer> = 0x000000000000001f (31)
36200:00:00.472 PCIFunctionNo <integer> = 0x0000000000000001 (1)
36300:00:00.472 Trusted <integer> = 0x0000000000000001 (1)
36400:00:00.472
36500:00:00.472 [/Devices/piix3ide/0/Config/] (level 4)
36600:00:00.472 Type <string> = "ICH6" (cb=5)
36700:00:00.472
36800:00:00.472 [/Devices/piix3ide/0/LUN#0/] (level 4)
36900:00:00.472 Driver <string> = "HostDVD" (cb=8)
37000:00:00.472
37100:00:00.472 [/Devices/piix3ide/0/LUN#0/Config/] (level 5)
37200:00:00.472 Passthrough <integer> = 0x0000000000000000 (0)
37300:00:00.472 Path <string> = "E:" (cb=3)
37400:00:00.472
37500:00:00.472 [/Devices/piix3ide/0/LUN#999/] (level 4)
37600:00:00.472 Driver <string> = "MainStatus" (cb=11)
37700:00:00.472
37800:00:00.472 [/Devices/piix3ide/0/LUN#999/Config/] (level 5)
37900:00:00.472 First <integer> = 0x0000000000000000 (0)
38000:00:00.472 Last <integer> = 0x0000000000000003 (3)
38100:00:00.472 papLeds <integer> = 0x0000000003129968 (51550568)
38200:00:00.472
38300:00:00.472 [/Devices/serial/] (level 2)
38400:00:00.472
38500:00:00.472 [/Devices/smc/] (level 2)
38600:00:00.472
38700:00:00.472 [/Devices/smc/0/] (level 3)
38800:00:00.472 Trusted <integer> = 0x0000000000000001 (1)
38900:00:00.472
39000:00:00.472 [/Devices/smc/0/Config/] (level 4)
39100:00:00.472 DeviceKey <string> = "" (cb=1)
39200:00:00.472 GetKeyFromRealSMC <integer> = 0x0000000000000000 (0)
39300:00:00.472
39400:00:00.472 [/Devices/usb-ehci/] (level 2)
39500:00:00.472
39600:00:00.472 [/Devices/usb-ehci/0/] (level 3)
39700:00:00.472 PCIBusNo <integer> = 0x0000000000000000 (0)
39800:00:00.472 PCIDeviceNo <integer> = 0x000000000000001f (31)
39900:00:00.472 PCIFunctionNo <integer> = 0x0000000000000005 (5)
40000:00:00.472 Trusted <integer> = 0x0000000000000001 (1)
40100:00:00.472
40200:00:00.472 [/Devices/usb-ehci/0/Config/] (level 4)
40300:00:00.472
40400:00:00.472 [/Devices/usb-ehci/0/LUN#0/] (level 4)
40500:00:00.472 Driver <string> = "VUSBRootHub" (cb=12)
40600:00:00.472
40700:00:00.472 [/Devices/usb-ehci/0/LUN#0/Config/] (level 5)
40800:00:00.472
40900:00:00.472 [/Devices/usb-ehci/0/LUN#999/] (level 4)
41000:00:00.472 Driver <string> = "MainStatus" (cb=11)
41100:00:00.472
41200:00:00.472 [/Devices/usb-ehci/0/LUN#999/Config/] (level 5)
41300:00:00.472 First <integer> = 0x0000000000000000 (0)
41400:00:00.472 Last <integer> = 0x0000000000000000 (0)
41500:00:00.472 papLeds <integer> = 0x0000000003129b88 (51551112)
41600:00:00.472
41700:00:00.472 [/Devices/usb-ohci/] (level 2)
41800:00:00.472
41900:00:00.472 [/Devices/usb-ohci/0/] (level 3)
42000:00:00.472 PCIBusNo <integer> = 0x0000000000000000 (0)
42100:00:00.472 PCIDeviceNo <integer> = 0x000000000000001f (31)
42200:00:00.472 PCIFunctionNo <integer> = 0x0000000000000004 (4)
42300:00:00.472 Trusted <integer> = 0x0000000000000001 (1)
42400:00:00.472
42500:00:00.472 [/Devices/usb-ohci/0/Config/] (level 4)
42600:00:00.472
42700:00:00.472 [/Devices/usb-ohci/0/LUN#0/] (level 4)
42800:00:00.472 Driver <string> = "VUSBRootHub" (cb=12)
42900:00:00.472
43000:00:00.472 [/Devices/usb-ohci/0/LUN#0/Config/] (level 5)
43100:00:00.472
43200:00:00.472 [/Devices/usb-ohci/0/LUN#999/] (level 4)
43300:00:00.472 Driver <string> = "MainStatus" (cb=11)
43400:00:00.472
43500:00:00.472 [/Devices/usb-ohci/0/LUN#999/Config/] (level 5)
43600:00:00.472 First <integer> = 0x0000000000000000 (0)
43700:00:00.472 Last <integer> = 0x0000000000000000 (0)
43800:00:00.472 papLeds <integer> = 0x0000000003129b80 (51551104)
43900:00:00.472
44000:00:00.472 [/Devices/vga/] (level 2)
44100:00:00.472
44200:00:00.472 [/Devices/vga/0/] (level 3)
44300:00:00.472 PCIBusNo <integer> = 0x0000000000000000 (0)
44400:00:00.472 PCIDeviceNo <integer> = 0x0000000000000002 (2)
44500:00:00.472 PCIFunctionNo <integer> = 0x0000000000000000 (0)
44600:00:00.472 Trusted <integer> = 0x0000000000000001 (1)
44700:00:00.472
44800:00:00.472 [/Devices/vga/0/Config/] (level 4)
44900:00:00.472 CustomVideoModes <integer> = 0x0000000000000000 (0)
45000:00:00.472 FadeIn <integer> = 0x0000000000000001 (1)
45100:00:00.472 FadeOut <integer> = 0x0000000000000001 (1)
45200:00:00.472 HeightReduction <integer> = 0x0000000000000000 (0)
45300:00:00.472 LogoFile <string> = "" (cb=1)
45400:00:00.472 LogoTime <integer> = 0x0000000000000000 (0)
45500:00:00.472 MonitorCount <integer> = 0x0000000000000001 (1)
45600:00:00.472 ShowBootMenu <integer> = 0x0000000000000002 (2)
45700:00:00.472 VRamSize <integer> = 0x0000000008000000 (134217728)
45800:00:00.472
45900:00:00.472 [/Devices/vga/0/LUN#0/] (level 4)
46000:00:00.472 Driver <string> = "MainDisplay" (cb=12)
46100:00:00.472
46200:00:00.472 [/Devices/vga/0/LUN#0/Config/] (level 5)
46300:00:00.472 Object <integer> = 0x0000000000983f40 (9977664)
46400:00:00.472
46500:00:00.472 [/Devices/virtio-net/] (level 2)
46600:00:00.472
46700:00:00.472 [/HWVirtExt/] (level 1)
46800:00:00.472 EnableLargePages <integer> = 0x0000000000000001 (1)
46900:00:00.472 EnableNestedPaging <integer> = 0x0000000000000001 (1)
47000:00:00.472 EnableVPID <integer> = 0x0000000000000001 (1)
47100:00:00.472 Enabled <integer> = 0x0000000000000001 (1)
47200:00:00.472 Exclusive <integer> = 0x0000000000000000 (0)
47300:00:00.472
47400:00:00.472 [/MM/] (level 1)
47500:00:00.472 CanUseLargerHeap <integer> = 0x0000000000000001 (1)
47600:00:00.472
47700:00:00.472 [/PDM/] (level 1)
47800:00:00.472
47900:00:00.472 [/PDM/AsyncCompletion/] (level 2)
48000:00:00.472
48100:00:00.472 [/PDM/AsyncCompletion/File/] (level 3)
48200:00:00.472
48300:00:00.472 [/PDM/AsyncCompletion/File/BwGroups/] (level 4)
48400:00:00.472
48500:00:00.472 [/PDM/BlkCache/] (level 2)
48600:00:00.472 CacheSize <integer> = 0x0000000000500000 (5242880)
48700:00:00.472
48800:00:00.472 [/PDM/Devices/] (level 2)
48900:00:00.472
49000:00:00.472 [/PDM/Devices/VBoxEhci/] (level 3)
49100:00:00.472 Path <string> = "F:\VMVIRT~1/ExtensionPacks/Oracle_VM_VirtualBox_Extension_Pack/win.amd64/VBoxEhciR3.DLL" (cb=88)
49200:00:00.472 R0SearchPath <string> = "F:\VMVIRT~1/ExtensionPacks/Oracle_VM_VirtualBox_Extension_Pack/win.amd64" (cb=73)
49300:00:00.472 RCSearchPath <string> = "F:\VMVIRT~1/ExtensionPacks/Oracle_VM_VirtualBox_Extension_Pack/win.amd64" (cb=73)
49400:00:00.472
49500:00:00.472 [/PDM/Drivers/] (level 2)
49600:00:00.472
49700:00:00.472 [/PDM/Drivers/VBoxC/] (level 3)
49800:00:00.472 Path <string> = "VBoxC" (cb=6)
49900:00:00.472
50000:00:00.472 [/TM/] (level 1)
50100:00:00.472 UTCOffset <integer> = 0x0000000000000000 (0)
50200:00:00.472
50300:00:00.472 [/USB/] (level 1)
50400:00:00.472
50500:00:00.472 [/USB/HidKeyboard/] (level 2)
50600:00:00.472
50700:00:00.472 [/USB/HidKeyboard/0/] (level 3)
50800:00:00.472
50900:00:00.472 [/USB/HidKeyboard/0/Config/] (level 4)
51000:00:00.472
51100:00:00.472 [/USB/HidKeyboard/0/LUN#0/] (level 4)
51200:00:00.472 Driver <string> = "KeyboardQueue" (cb=14)
51300:00:00.472
51400:00:00.472 [/USB/HidKeyboard/0/LUN#0/AttachedDriver/] (level 5)
51500:00:00.472 Driver <string> = "MainKeyboard" (cb=13)
51600:00:00.472
51700:00:00.472 [/USB/HidKeyboard/0/LUN#0/AttachedDriver/Config/] (level 6)
51800:00:00.472 Object <integer> = 0x0000000003129eb0 (51551920)
51900:00:00.472
52000:00:00.472 [/USB/HidKeyboard/0/LUN#0/Config/] (level 5)
52100:00:00.472 QueueSize <integer> = 0x0000000000000040 (64)
52200:00:00.472
52300:00:00.472 [/USB/HidMouse/] (level 2)
52400:00:00.472
52500:00:00.472 [/USB/HidMouse/0/] (level 3)
52600:00:00.472
52700:00:00.472 [/USB/HidMouse/0/Config/] (level 4)
52800:00:00.472 Absolute <integer> = 0x0000000000000001 (1)
52900:00:00.472
53000:00:00.472 [/USB/HidMouse/0/LUN#0/] (level 4)
53100:00:00.472 Driver <string> = "MouseQueue" (cb=11)
53200:00:00.472
53300:00:00.472 [/USB/HidMouse/0/LUN#0/AttachedDriver/] (level 5)
53400:00:00.472 Driver <string> = "MainMouse" (cb=10)
53500:00:00.472
53600:00:00.472 [/USB/HidMouse/0/LUN#0/AttachedDriver/Config/] (level 6)
53700:00:00.472 Object <integer> = 0x0000000000972b50 (9907024)
53800:00:00.472
53900:00:00.472 [/USB/HidMouse/0/LUN#0/Config/] (level 5)
54000:00:00.472 QueueSize <integer> = 0x0000000000000080 (128)
54100:00:00.472
54200:00:00.472 [/USB/USBProxy/] (level 2)
54300:00:00.472
54400:00:00.472 [/USB/USBProxy/GlobalConfig/] (level 3)
54500:00:00.472
54600:00:00.472 ********************* End of CFGM dump **********************
54700:00:00.472 MM: cbHyperHeap=0x220000 (2228224)
54800:00:00.476 CPUMSetGuestCpuIdFeature: Enabled PAE
54900:00:00.476 Logical host processors: 8 present, 8 max, 8 online, online mask: 00000000000000ff
55000:00:00.476 ************************* CPUID dump ************************
55100:00:00.476 RAW Standard CPUIDs
55200:00:00.476 Function eax ebx ecx edx
55300:00:00.476 Gst: 00000000 00000005 756e6547 6c65746e 49656e69
55400:00:00.476 Hst: 0000000b 756e6547 6c65746e 49656e69
55500:00:00.476 Gst: 00000001 000106e5 00000800 00000209 078bf1ff
55600:00:00.476 Hst: 000106e5 04100800 0098e3fd bfebfbff
55700:00:00.476 Gst: 00000002 55035a01 00f0b2de 00000000 09ca212c
55800:00:00.476 Hst: 55035a01 00f0b2de 00000000 09ca212c
55900:00:00.476 Gst: 00000003 00000000 00000000 00000000 00000000
56000:00:00.476 Hst: 00000000 00000000 00000000 00000000
56100:00:00.476 Gst: 00000004 00000000 00000000 00000000 00000000
56200:00:00.476 Hst: 00000000 00000000 00000000 00000000
56300:00:00.476 Gst: 00000005 00000040 00000040 00000003 00000000
56400:00:00.476 Hst: 00000040 00000040 00000003 00001120
56500:00:00.476 Name: GenuineIntel
56600:00:00.476 Supports: 0-5
56700:00:00.476 Family: 6 Extended: 0 Effective: 6
56800:00:00.476 Model: 14 Extended: 1 Effective: 30
56900:00:00.476 Stepping: 5
57000:00:00.476 Type: 0 (primary)
57100:00:00.476 APIC ID: 0x00
57200:00:00.476 Logical CPUs: 0
57300:00:00.476 CLFLUSH Size: 8
57400:00:00.476 Brand ID: 0x00
57500:00:00.476 Mnemonic - Description = guest (host)
57600:00:00.476 FPU - x87 FPU on Chip = 1 (1)
57700:00:00.476 VME - Virtual 8086 Mode Enhancements = 1 (1)
57800:00:00.476 DE - Debugging extensions = 1 (1)
57900:00:00.476 PSE - Page Size Extension = 1 (1)
58000:00:00.476 TSC - Time Stamp Counter = 1 (1)
58100:00:00.476 MSR - Model Specific Registers = 1 (1)
58200:00:00.476 PAE - Physical Address Extension = 1 (1)
58300:00:00.476 MCE - Machine Check Exception = 1 (1)
58400:00:00.476 CX8 - CMPXCHG8B instruction = 1 (1)
58500:00:00.476 APIC - APIC On-Chip = 0 (1)
58600:00:00.476 10 - Reserved = 0 (0)
58700:00:00.476 SEP - SYSENTER and SYSEXIT = 0 (1)
58800:00:00.476 MTRR - Memory Type Range Registers = 1 (1)
58900:00:00.476 PGE - PTE Global Bit = 1 (1)
59000:00:00.476 MCA - Machine Check Architecture = 1 (1)
59100:00:00.476 CMOV - Conditional Move Instructions = 1 (1)
59200:00:00.476 PAT - Page Attribute Table = 1 (1)
59300:00:00.476 PSE-36 - 36-bit Page Size Extention = 1 (1)
59400:00:00.476 PSN - Processor Serial Number = 0 (0)
59500:00:00.476 CLFSH - CLFLUSH Instruction. = 1 (1)
59600:00:00.476 20 - Reserved = 0 (0)
59700:00:00.476 DS - Debug Store = 0 (1)
59800:00:00.476 ACPI - Thermal Mon. & Soft. Clock Ctrl.= 0 (1)
59900:00:00.476 MMX - Intel MMX Technology = 1 (1)
60000:00:00.476 FXSR - FXSAVE and FXRSTOR Instructions = 1 (1)
60100:00:00.476 SSE - SSE Support = 1 (1)
60200:00:00.476 SSE2 - SSE2 Support = 1 (1)
60300:00:00.476 SS - Self Snoop = 0 (1)
60400:00:00.476 HTT - Hyper-Threading Technology = 0 (1)
60500:00:00.476 TM - Thermal Monitor = 0 (1)
60600:00:00.476 30 - Reserved = 0 (0)
60700:00:00.476 PBE - Pending Break Enable = 0 (1)
60800:00:00.476 Supports SSE3 = 1 (1)
60900:00:00.476 PCLMULQDQ = 0 (0)
61000:00:00.476 DS Area 64-bit layout = 0 (1)
61100:00:00.476 Supports MONITOR/MWAIT = 1 (1)
61200:00:00.476 CPL-DS - CPL Qualified Debug Store = 0 (1)
61300:00:00.476 VMX - Virtual Machine Technology = 0 (1)
61400:00:00.476 SMX - Safer Mode Extensions = 0 (1)
61500:00:00.476 Enhanced SpeedStep Technology = 0 (1)
61600:00:00.476 Terminal Monitor 2 = 0 (1)
61700:00:00.476 Supplemental SSE3 instructions = 1 (1)
61800:00:00.476 L1 Context ID = 0 (0)
61900:00:00.476 11 - Reserved = 0 (0)
62000:00:00.476 FMA extensions using YMM state = 0 (0)
62100:00:00.476 CMPXCHG16B instruction = 0 (1)
62200:00:00.476 xTPR Update Control = 0 (1)
62300:00:00.476 Perf/Debug Capability MSR = 0 (1)
62400:00:00.476 16 - Reserved = 0 (0)
62500:00:00.476 PCID - Process-context identifiers = 0 (0)
62600:00:00.476 DCA - Direct Cache Access = 0 (0)
62700:00:00.476 SSE4.1 instruction extensions = 0 (1)
62800:00:00.476 SSE4.2 instruction extensions = 0 (1)
62900:00:00.476 Supports the x2APIC extensions = 0 (0)
63000:00:00.476 MOVBE instruction = 0 (0)
63100:00:00.476 POPCNT instruction = 0 (1)
63200:00:00.476 TSC-Deadline LAPIC timer mode = 0 (0)
63300:00:00.476 AESNI instruction extensions = 0 (0)
63400:00:00.476 XSAVE/XRSTOR extended state feature = 0 (0)
63500:00:00.476 Supports OSXSAVE = 0 (0)
63600:00:00.476 AVX instruction extensions = 0 (0)
63700:00:00.476 29/30 - Reserved = 0x0 (0x0)
63800:00:00.476 31 - Reserved (always 0) = 0 (0)
63900:00:00.476
64000:00:00.476 RAW Extended CPUIDs
64100:00:00.476 Function eax ebx ecx edx
64200:00:00.476 Gst: 80000000 80000008 00000000 00000000 00000000
64300:00:00.476 Hst: 80000008 00000000 00000000 00000000
64400:00:00.476 Gst: 80000001 00000000 00000000 00000000 00000000
64500:00:00.476 Hst: 00000000 00000000 00000001 28100800
64600:00:00.476 Gst: 80000002 65746e49 2952286c 726f4320 4d542865
64700:00:00.476 Hst: 65746e49 2952286c 726f4320 4d542865
64800:00:00.476 Gst: 80000003 37692029 55504320 20202020 51202020
64900:00:00.476 Hst: 37692029 55504320 20202020 51202020
65000:00:00.476 Gst: 80000004 30323720 20402020 30362e31 007a4847
65100:00:00.476 Hst: 30323720 20402020 30362e31 007a4847
65200:00:00.476 Gst: 80000005 00000000 00000000 00000000 00000000
65300:00:00.476 Hst: 00000000 00000000 00000000 00000000
65400:00:00.476 Gst: 80000006 00000000 00000000 01006040 00000000
65500:00:00.476 Hst: 00000000 00000000 01006040 00000000
65600:00:00.476 Gst: 80000007 00000000 00000000 00000000 00000000
65700:00:00.476 Hst: 00000000 00000000 00000000 00000100
65800:00:00.476 Gst: 80000008 00003024 00000000 00000000 00000000
65900:00:00.476 Hst: 00003024 00000000 00000000 00000000
66000:00:00.476 Gst: 80000009 00000000 00000000 0000006e 00000004*
66100:00:00.476 Hst: 00000000 00000000 00000098 00000004
66200:00:00.476 Ext Name:
66300:00:00.476 Ext Supports: 0x80000000-0x80000008
66400:00:00.476 Family: 0 Extended: 0 Effective: 0
66500:00:00.476 Model: 0 Extended: 0 Effective: 0
66600:00:00.476 Stepping: 0
66700:00:00.476 Brand ID: 0x000
66800:00:00.476 Mnemonic - Description = guest (host)
66900:00:00.476 FPU - x87 FPU on Chip = 0 (0)
67000:00:00.476 VME - Virtual 8086 Mode Enhancements = 0 (0)
67100:00:00.476 DE - Debugging extensions = 0 (0)
67200:00:00.476 PSE - Page Size Extension = 0 (0)
67300:00:00.476 TSC - Time Stamp Counter = 0 (0)
67400:00:00.476 MSR - K86 Model Specific Registers = 0 (0)
67500:00:00.476 PAE - Physical Address Extension = 0 (0)
67600:00:00.476 MCE - Machine Check Exception = 0 (0)
67700:00:00.476 CX8 - CMPXCHG8B instruction = 0 (0)
67800:00:00.476 APIC - APIC On-Chip = 0 (0)
67900:00:00.476 10 - Reserved = 0 (0)
68000:00:00.476 SEP - SYSCALL and SYSRET = 0 (1)
68100:00:00.476 MTRR - Memory Type Range Registers = 0 (0)
68200:00:00.476 PGE - PTE Global Bit = 0 (0)
68300:00:00.476 MCA - Machine Check Architecture = 0 (0)
68400:00:00.476 CMOV - Conditional Move Instructions = 0 (0)
68500:00:00.476 PAT - Page Attribute Table = 0 (0)
68600:00:00.476 PSE-36 - 36-bit Page Size Extention = 0 (0)
68700:00:00.476 18 - Reserved = 0 (0)
68800:00:00.476 19 - Reserved = 0 (0)
68900:00:00.476 NX - No-Execute Page Protection = 0 (1)
69000:00:00.476 DS - Debug Store = 0 (0)
69100:00:00.476 AXMMX - AMD Extensions to MMX Instr. = 0 (0)
69200:00:00.476 MMX - Intel MMX Technology = 0 (0)
69300:00:00.476 FXSR - FXSAVE and FXRSTOR Instructions = 0 (0)
69400:00:00.476 25 - AMD fast FXSAVE and FXRSTOR Instr.= 0 (0)
69500:00:00.476 26 - 1 GB large page support = 0 (0)
69600:00:00.476 27 - RDTSCP instruction = 0 (1)
69700:00:00.476 28 - Reserved = 0 (0)
69800:00:00.476 29 - AMD Long Mode = 0 (1)
69900:00:00.476 30 - AMD Extensions to 3DNow = 0 (0)
70000:00:00.476 31 - AMD 3DNow = 0 (0)
70100:00:00.476 LahfSahf - LAHF/SAHF in 64-bit mode = 0 (1)
70200:00:00.476 CmpLegacy - Core MP legacy mode (depr) = 0 (0)
70300:00:00.476 SVM - AMD VM Extensions = 0 (0)
70400:00:00.476 APIC registers starting at 0x400 = 0 (0)
70500:00:00.476 AltMovCR8 - LOCK MOV CR0 means MOV CR8 = 0 (0)
70600:00:00.476 Advanced bit manipulation = 0 (0)
70700:00:00.476 SSE4A instruction support = 0 (0)
70800:00:00.476 Misaligned SSE mode = 0 (0)
70900:00:00.476 PREFETCH and PREFETCHW instruction = 0 (0)
71000:00:00.476 OS visible workaround = 0 (0)
71100:00:00.476 Instruction based sampling = 0 (0)
71200:00:00.476 SSE5 support = 0 (0)
71300:00:00.476 SKINIT, STGI, and DEV support = 0 (0)
71400:00:00.476 Watchdog timer support. = 0 (0)
71500:00:00.476 31:14 - Reserved = 0x0 (0x0)
71600:00:00.476 Full Name: Intel(R) Core(TM) i7 CPU Q 720 @ 1.60GHz
71700:00:00.476 TLB 2/4M Instr/Uni: res0 0 entries
71800:00:00.476 TLB 2/4M Data: res0 0 entries
71900:00:00.476 TLB 4K Instr/Uni: res0 0 entries
72000:00:00.476 TLB 4K Data: res0 0 entries
72100:00:00.476 L1 Instr Cache Line Size: 0 bytes
72200:00:00.476 L1 Instr Cache Lines Per Tag: 0
72300:00:00.476 L1 Instr Cache Associativity: res0
72400:00:00.476 L1 Instr Cache Size: 0 KB
72500:00:00.476 L1 Data Cache Line Size: 0 bytes
72600:00:00.476 L1 Data Cache Lines Per Tag: 0
72700:00:00.476 L1 Data Cache Associativity: res0
72800:00:00.476 L1 Data Cache Size: 0 KB
72900:00:00.476 L2 TLB 2/4M Instr/Uni: off 0 entries
73000:00:00.476 L2 TLB 2/4M Data: off 0 entries
73100:00:00.476 L2 TLB 4K Instr/Uni: off 0 entries
73200:00:00.476 L2 TLB 4K Data: off 0 entries
73300:00:00.476 L2 Cache Line Size: 0 bytes
73400:00:00.476 L2 Cache Lines Per Tag: 0
73500:00:00.476 L2 Cache Associativity: off
73600:00:00.476 L2 Cache Size: 0 KB
73700:00:00.476 APM Features:
73800:00:00.476 Physical Address Width: 36 bits
73900:00:00.476 Virtual Address Width: 48 bits
74000:00:00.476 Guest Physical Address Width: 0 bits
74100:00:00.476 Physical Core Count: 0
74200:00:00.476
74300:00:00.476 RAW Centaur CPUIDs
74400:00:00.476 Function eax ebx ecx edx
74500:00:00.476 Gst: c0000000 00000000 00000000 0000006e 00000004
74600:00:00.476 Hst: 00000000 00000000 00000098 00000004
74700:00:00.476 Gst: c0000001 00000000 00000000 0000006e 00000004*
74800:00:00.476 Hst: 00000000 00000000 00000098 00000004
74900:00:00.476 Gst: c0000002 00000000 00000000 0000006e 00000004*
75000:00:00.476 Hst: 00000000 00000000 00000098 00000004
75100:00:00.476 Gst: c0000003 00000000 00000000 0000006e 00000004*
75200:00:00.476 Hst: 00000000 00000000 00000098 00000004
75300:00:00.476 Centaur Supports: 0xc0000000-0x00000000
75400:00:00.476
75500:00:00.476 ******************** End of CPUID dump **********************
75600:00:00.477 Debug: HCPhysInterPD=00000000bf75e000 HCPhysInterPaePDPT=00000000bf75b000 HCPhysInterPaePML4=00000000bf759000
75700:00:00.477 Debug: apInterPTs={00000000bf75d000,00000000bf75c000} apInterPaePTs={00000000983c6000,00000000b83c7000} apInterPaePDs={00000001273c8000,000000015ee49000,00000000aa14a000,000000009234b000} pInterPaePDPT64=00000000bf75a000
75800:00:00.477 pgmR3PoolInit: cMaxPages=0x400 cMaxUsers=0x800 cMaxPhysExts=0x800 fCacheEnable=true
75900:00:00.479 REM: Loading F:\VMVIRT~1/VBoxREM2.rel at 0x0000000004289f40 (978432 bytes)
76000:00:00.479 REM: (gdb) add-symbol-file F:\VMVIRT~1/VBoxREM2.rel 0x0000000004289f40
76100:00:00.504 TM: GIP - u32Mode=1 (SyncTSC) u32UpdateHz=66
76200:00:00.536 TM: cTSCTicksPerSecond=0x5dc3635a (1 573 086 042) fTSCVirtualized=true fTSCUseRealTSC=false
76300:00:00.536 TM: fMaybeUseOffsettedHostTSC=true TSCTiedToExecution=false TSCNotTiedToHalt=false
76400:00:00.536 CoreCode: R3=0000000002460000 R0=fffff880084bd000 RC=a0a86000 Phys=00000000bf435000 cb=0x1000
76500:00:00.540 AIOMgr: Default manager type is "Async"
76600:00:00.540 AIOMgr: Default file backend is "NonBuffered"
76700:00:00.540 BlkCache: Cache successfully initialised. Cache size is 5242880 bytes
76800:00:00.540 BlkCache: Cache commit interval is 10000 ms
76900:00:00.540 BlkCache: Cache commit threshold is 2621440 bytes
77000:00:00.542 [SMP] BIOS with 1 CPUs
77100:00:00.547 SUP: Loaded VBoxDDR0.r0 (F:\VMVIRT~1\VBoxDDR0.r0) at 0xfffff8800bc94000 - ModuleInit at 0000000000000000 and ModuleTerm at 0000000000000000 using the native ring-0 loader
77200:00:00.547 SUP: windbg> .reload /f F:\VMVIRT~1\VBoxDDR0.r0=0xfffff8800bc94000
77300:00:00.551 SUP: Loaded VBoxDD2R0.r0 (F:\VMVIRT~1\VBoxDD2R0.r0) at 0xfffff8800bcb7000 - ModuleInit at 0000000000000000 and ModuleTerm at 0000000000000000 using the native ring-0 loader
77400:00:00.551 SUP: windbg> .reload /f F:\VMVIRT~1\VBoxDD2R0.r0=0xfffff8800bcb7000
77500:00:00.551 Activating Local APIC
77600:00:00.551 CPUMSetGuestCpuIdFeature: Enabled APIC
77700:00:00.551 CPUMSetGuestCpuIdFeature: Disabled x2APIC
77800:00:00.551 PIT: mode=3 count=0x10000 (65536) - 18.20 Hz (ch=0)
77900:00:00.556 Shared Folders service loaded.
78000:00:00.587 DrvBlock: Flushes will be ignored
78100:00:00.587 DrvBlock: Async flushes will be passed to the disk
78200:00:00.587 VDInit finished
78300:00:00.602 AIOMgr: Endpoint for file 'C:\Users\HC80\VirtualBox VMs\WM\WM.vdi' (flags 000c0723) created successfully
78400:00:00.650 AHCI: LUN#0: disk, PCHS=16383/16/63, total number of sectors 209715200
78500:00:00.650 AHCI: LUN#0: using async I/O
78600:00:00.651 AHCI ATA: LUN#0: disk, PCHS=16383/16/63, total number of sectors 209715200
78700:00:00.651 AHCI ATA: LUN#1: no unit
78800:00:00.651 AHCI ATA: Ctl: finished processing RESET
78900:00:00.651 AHCI ATA: LUN#2: no unit
79000:00:00.651 AHCI ATA: LUN#3: no unit
79100:00:00.651 AHCI ATA: Ctl: finished processing RESET
79200:00:00.651 AHCI ATA: Ctl: finished processing RESET
79300:00:00.651 AHCI ATA: Ctl: finished processing RESET
79400:00:00.656 PIIX3 ATA: LUN#0: CD/DVD, total number of sectors 1507417, passthrough disabled
79500:00:00.656 PIIX3 ATA: LUN#1: no unit
79600:00:00.656 PIIX3 ATA: LUN#2: no unit
79700:00:00.656 PIIX3 ATA: LUN#3: no unit
79800:00:00.656 PIIX3 ATA: Ctl#1: finished processing RESET
79900:00:00.656 PIIX3 ATA: Ctl#0: finished processing RESET
80000:00:00.669 NAT: value of BindIP has been ignored
80100:00:00.670 Audio: Trying driver 'dsound'.
80200:00:00.776 HDAcodec: can't open in fmt(freq: 44100)
80300:00:00.778 HDAcodec: can't open out fmt(freq: 44100)
80400:00:00.778 VUSB: attached 'HidKeyboard' to port 1
80500:00:00.778 VUSB: attached 'HidMouse' to port 2
80600:00:00.783 SUP: Loaded VBoxEhciR0.r0 (F:\VMVIRT~1\ExtensionPacks\Oracle_VM_VirtualBox_Extension_Pack\win.amd64\VBoxEhciR0.r0) at 0xfffff8800bcbb000 - ModuleInit at 0000000000000000 and ModuleTerm at 0000000000000000 using the native ring-0 loader
80700:00:00.783 SUP: windbg> .reload /f F:\VMVIRT~1\ExtensionPacks\Oracle_VM_VirtualBox_Extension_Pack\win.amd64\VBoxEhciR0.r0=0xfffff8800bcbb000
80800:00:00.783 DevPcBios: SATA LUN#0 LCHS=1024/255/63
80900:00:00.783 PGM: The CPU physical address width is 36 bits
81000:00:00.783 PGMR3InitFinalize: 4 MB PSE mask 0000000fffffffff
81100:00:00.789 VMM: fUsePeriodicPreemptionTimers=false
81200:00:00.790 HWACCM: Host CR4=000006F8
81300:00:00.790 HWACCM: MSR_IA32_FEATURE_CONTROL = 5
81400:00:00.790 HWACCM: MSR_IA32_VMX_BASIC_INFO = da04000000000e
81500:00:00.790 HWACCM: VMCS id = e
81600:00:00.790 HWACCM: VMCS size = 400
81700:00:00.790 HWACCM: VMCS physical address limit = None
81800:00:00.790 HWACCM: VMCS memory type = 6
81900:00:00.790 HWACCM: Dual monitor treatment = 1
82000:00:00.790 HWACCM: MSR_IA32_VMX_PINBASED_CTLS = 7f00000016
82100:00:00.790 HWACCM: VMX_VMCS_CTRL_PIN_EXEC_CONTROLS_EXT_INT_EXIT
82200:00:00.790 HWACCM: VMX_VMCS_CTRL_PIN_EXEC_CONTROLS_NMI_EXIT
82300:00:00.790 HWACCM: VMX_VMCS_CTRL_PIN_EXEC_CONTROLS_VIRTUAL_NMI
82400:00:00.790 HWACCM: VMX_VMCS_CTRL_PIN_EXEC_CONTROLS_PREEMPT_TIMER
82500:00:00.790 HWACCM: MSR_IA32_VMX_PROCBASED_CTLS = fff9fffe0401e172
82600:00:00.791 HWACCM: VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_IRQ_WINDOW_EXIT
82700:00:00.791 HWACCM: VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_TSC_OFFSET
82800:00:00.791 HWACCM: VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_HLT_EXIT
82900:00:00.791 HWACCM: VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_INVLPG_EXIT
83000:00:00.791 HWACCM: VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_MWAIT_EXIT
83100:00:00.791 HWACCM: VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_RDPMC_EXIT
83200:00:00.791 HWACCM: VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_RDTSC_EXIT
83300:00:00.791 HWACCM: VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_CR3_LOAD_EXIT
83400:00:00.791 HWACCM: VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_CR3_STORE_EXIT
83500:00:00.791 HWACCM: VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_CR8_LOAD_EXIT
83600:00:00.791 HWACCM: VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_CR8_STORE_EXIT
83700:00:00.791 HWACCM: VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_USE_TPR_SHADOW
83800:00:00.791 HWACCM: VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_NMI_WINDOW_EXIT
83900:00:00.791 HWACCM: VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_MOV_DR_EXIT
84000:00:00.791 HWACCM: VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_UNCOND_IO_EXIT
84100:00:00.791 HWACCM: VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_USE_IO_BITMAPS
84200:00:00.791 HWACCM: VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_MONITOR_TRAP_FLAG
84300:00:00.791 HWACCM: VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_USE_MSR_BITMAPS
84400:00:00.791 HWACCM: VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_MONITOR_EXIT
84500:00:00.791 HWACCM: VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_PAUSE_EXIT
84600:00:00.791 HWACCM: VMX_VMCS_CTRL_PROC_EXEC_USE_SECONDARY_EXEC_CTRL
84700:00:00.791 HWACCM: VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_CR3_LOAD_EXIT *must* be set
84800:00:00.791 HWACCM: VMX_VMCS_CTRL_PROC_EXEC_CONTROLS_CR3_STORE_EXIT *must* be set
84900:00:00.791 HWACCM: MSR_IA32_VMX_PROCBASED_CTLS2 = 7f00000000
85000:00:00.791 HWACCM: VMX_VMCS_CTRL_PROC_EXEC2_VIRT_APIC
85100:00:00.791 HWACCM: VMX_VMCS_CTRL_PROC_EXEC2_EPT
85200:00:00.791 HWACCM: VMX_VMCS_CTRL_PROC_EXEC2_DESCRIPTOR_INSTR_EXIT
85300:00:00.791 HWACCM: VMX_VMCS_CTRL_PROC_EXEC2_RDTSCP_EXIT
85400:00:00.791 HWACCM: VMX_VMCS_CTRL_PROC_EXEC2_X2APIC
85500:00:00.791 HWACCM: VMX_VMCS_CTRL_PROC_EXEC2_VPID
85600:00:00.791 HWACCM: VMX_VMCS_CTRL_PROC_EXEC2_WBINVD_EXIT
85700:00:00.791 HWACCM: MSR_IA32_VMX_ENTRY_CTLS = ffff000011ff
85800:00:00.791 HWACCM: VMX_VMCS_CTRL_ENTRY_CONTROLS_LOAD_DEBUG
85900:00:00.791 HWACCM: VMX_VMCS_CTRL_ENTRY_CONTROLS_IA64_MODE
86000:00:00.791 HWACCM: VMX_VMCS_CTRL_ENTRY_CONTROLS_ENTRY_SMM
86100:00:00.791 HWACCM: VMX_VMCS_CTRL_ENTRY_CONTROLS_DEACTIVATE_DUALMON
86200:00:00.791 HWACCM: VMX_VMCS_CTRL_ENTRY_CONTROLS_LOAD_GUEST_PERF_MSR
86300:00:00.791 HWACCM: VMX_VMCS_CTRL_ENTRY_CONTROLS_LOAD_GUEST_PAT_MSR
86400:00:00.791 HWACCM: VMX_VMCS_CTRL_ENTRY_CONTROLS_LOAD_GUEST_EFER_MSR
86500:00:00.791 HWACCM: VMX_VMCS_CTRL_ENTRY_CONTROLS_LOAD_DEBUG *must* be set
86600:00:00.791 HWACCM: MSR_IA32_VMX_EXIT_CTLS = 7fffff00036dff
86700:00:00.791 HWACCM: VMX_VMCS_CTRL_EXIT_CONTROLS_SAVE_DEBUG
86800:00:00.791 HWACCM: VMX_VMCS_CTRL_EXIT_CONTROLS_HOST_AMD64
86900:00:00.791 HWACCM: VMX_VMCS_CTRL_EXIT_CONTROLS_ACK_EXTERNAL_IRQ
87000:00:00.791 HWACCM: VMX_VMCS_CTRL_EXIT_CONTROLS_SAVE_GUEST_PAT_MSR
87100:00:00.791 HWACCM: VMX_VMCS_CTRL_EXIT_CONTROLS_LOAD_HOST_PAT_MSR
87200:00:00.791 HWACCM: VMX_VMCS_CTRL_EXIT_CONTROLS_SAVE_GUEST_EFER_MSR
87300:00:00.791 HWACCM: VMX_VMCS_CTRL_EXIT_CONTROLS_LOAD_HOST_EFER_MSR
87400:00:00.791 HWACCM: VMX_VMCS_CTRL_EXIT_CONTROLS_SAVE_VMX_PREEMPT_TIMER
87500:00:00.791 HWACCM: VMX_VMCS_CTRL_EXIT_CONTROLS_SAVE_DEBUG *must* be set
87600:00:00.791 HWACCM: MSR_IA32_VMX_EPT_VPID_CAPS = f0106114141
87700:00:00.791 HWACCM: MSR_IA32_VMX_EPT_CAPS_RWX_X_ONLY
87800:00:00.791 HWACCM: MSR_IA32_VMX_EPT_CAPS_GAW_48_BITS
87900:00:00.791 HWACCM: MSR_IA32_VMX_EPT_CAPS_EMT_UC
88000:00:00.791 HWACCM: MSR_IA32_VMX_EPT_CAPS_EMT_WB
88100:00:00.791 HWACCM: MSR_IA32_VMX_EPT_CAPS_SP_21_BITS
88200:00:00.791 HWACCM: MSR_IA32_VMX_EPT_CAPS_INVEPT
88300:00:00.791 HWACCM: MSR_IA32_VMX_EPT_CAPS_INVEPT_CAPS_CONTEXT
88400:00:00.791 HWACCM: MSR_IA32_VMX_EPT_CAPS_INVEPT_CAPS_ALL
88500:00:00.791 HWACCM: MSR_IA32_VMX_EPT_CAPS_INVVPID
88600:00:00.791 HWACCM: MSR_IA32_VMX_EPT_CAPS_INVVPID_CAPS_INDIV
88700:00:00.791 HWACCM: MSR_IA32_VMX_EPT_CAPS_INVVPID_CAPS_CONTEXT
88800:00:00.791 HWACCM: MSR_IA32_VMX_EPT_CAPS_INVVPID_CAPS_ALL
88900:00:00.791 HWACCM: MSR_IA32_VMX_EPT_CAPS_INVVPID_CAPS_CONTEXT_GLOBAL
89000:00:00.791 HWACCM: MSR_IA32_VMX_MISC = 401c5
89100:00:00.791 HWACCM: MSR_IA32_VMX_MISC_PREEMPT_TSC_BIT 5 - erratum detected, using 0 instead
89200:00:00.791 HWACCM: MSR_IA32_VMX_MISC_ACTIVITY_STATES 7
89300:00:00.791 HWACCM: MSR_IA32_VMX_MISC_CR3_TARGET 4
89400:00:00.791 HWACCM: MSR_IA32_VMX_MISC_MAX_MSR 200
89500:00:00.791 HWACCM: MSR_IA32_VMX_MISC_MSEG_ID 0
89600:00:00.791 HWACCM: MSR_IA32_VMX_CR0_FIXED0 = 80000021
89700:00:00.791 HWACCM: MSR_IA32_VMX_CR0_FIXED1 = ffffffff
89800:00:00.791 HWACCM: MSR_IA32_VMX_CR4_FIXED0 = 2000
89900:00:00.791 HWACCM: MSR_IA32_VMX_CR4_FIXED1 = 67ff
90000:00:00.791 HWACCM: MSR_IA32_VMX_VMCS_ENUM = 2a
90100:00:00.791 HWACCM: TPR shadow physaddr = 00000000bf434000
90200:00:00.791 HWACCM: VCPU0: MSR bitmap physaddr = 00000000bf431000
90300:00:00.791 HWACCM: VCPU0: VMCS physaddr = 00000000bf433000
90400:00:00.791 HWACCM: Real Mode TSS guest physaddr = 00000000f0800000
90500:00:00.791 HWACCM: Non-Paging Mode EPT CR3 = 00000000f0803000
90600:00:00.791 CPUMSetGuestCpuIdFeature: Enabled sysenter/exit
90700:00:00.791 CPUMSetGuestCpuIdFeature: Enabled PAE
90800:00:00.791 CPUMSetGuestCpuIdFeature: Enabled LONG MODE
90900:00:00.791 CPUMSetGuestCpuIdFeature: Enabled syscall/ret
91000:00:00.791 CPUMSetGuestCpuIdFeature: Enabled LAHF/SAHF
91100:00:00.791 CPUMSetGuestCpuIdFeature: Enabled NXE
91200:00:00.791 HWACCM: 32-bit and 64-bit guests supported.
91300:00:00.791 HWACCM: VMX enabled!
91400:00:00.791 HWACCM: Enabled nested paging
91500:00:00.791 HWACCM: EPT root page = 00000000bf452000
91600:00:00.791 HWACCM: Large page support enabled!
91700:00:00.791 HWACCM: enmFlushPage 1
91800:00:00.791 HWACCM: enmFlushContext 1
91900:00:00.791 HWACCM: TPR Patching disabled.
92000:00:00.791 HWACCM: Using the VMX-preemption timer (cPreemptTimerShift=0)
92100:00:00.791 HWACCM: VT-x/AMD-V init method: LOCAL
92200:00:00.795 VM: Halt method global1 (5)
92300:00:00.795 HaltedGlobal1 config: cNsSpinBlockThresholdCfg=125000
92400:00:00.795 Changing the VM state from 'CREATING' to 'CREATED'.
92500:00:00.795 Changing the VM state from 'CREATED' to 'POWERING_ON'.
92600:00:00.795 AIOMgr: Endpoints without assigned bandwidth groups:
92700:00:00.795 AIOMgr: C:\Users\HC80\VirtualBox VMs\WM\WM.vdi
92800:00:00.795 Changing the VM state from 'POWERING_ON' to 'RUNNING'.
92900:00:00.800 Guest Log: BIOS: VirtualBox 4.0.8
93000:00:00.800 PIT: mode=2 count=0x10000 (65536) - 18.20 Hz (ch=0)
93100:00:00.810 ERROR [COM]: aRC=VBOX_E_IPRT_ERROR (0x80bb0005) aIID={09eed313-cd56-4d06-bd56-fac0f716b5dd} aComponent={Display} aText={Could not take a screenshot (VERR_NOT_SUPPORTED)}, preserve=false
93200:00:00.838 ERROR [COM]: aRC=VBOX_E_IPRT_ERROR (0x80bb0005) aIID={09eed313-cd56-4d06-bd56-fac0f716b5dd} aComponent={Display} aText={Could not take a screenshot (VERR_NOT_SUPPORTED)}, preserve=false
93300:00:00.860 PIIX3 ATA: Ctl#0: RESET, DevSel=0 AIOIf=0 CmdIf0=0x00 (-1 usec ago) CmdIf1=0x00 (-1 usec ago)
93400:00:00.860 PIIX3 ATA: Ctl#0: finished processing RESET
93500:00:00.861 AHCI ATA: Ctl: RESET, DevSel=0 AIOIf=0 CmdIf0=0x00 (-1 usec ago) CmdIf1=0x00 (-1 usec ago)
93600:00:00.861 AHCI ATA: Ctl: finished processing RESET
93700:00:00.861 Guest Log: BIOS: ata2-0: PCHS=16383/16/63 LCHS=1024/255/63
93800:00:00.862 PIT: mode=2 count=0x48d3 (18643) - 64.00 Hz (ch=0)
93900:00:00.876 Display::handleDisplayResize(): uScreenId = 0, pvVRAM=00000000093d0000 w=640 h=480 bpp=32 cbLine=0xA00, flags=0x1
94000:00:01.115 2D video acceleration is disabled.
94100:00:03.340 PIT: mode=2 count=0x10000 (65536) - 18.20 Hz (ch=0)
94200:00:03.340 Guest Log: BIOS: Boot from Floppy 0 failed
94300:00:03.345 Display::handleDisplayResize(): uScreenId = 0, pvVRAM=0000000000000000 w=720 h=400 bpp=0 cbLine=0x0, flags=0x1
94400:00:09.709 Guest Log: BIOS: Booting from CD-ROM...
94500:00:33.021 PCI: attempt to write extended register: 100 (4) <- val
94600:00:33.021 PCI: attempt to write extended register: 104 (4) <- val
94700:00:33.021 PCI: attempt to write extended register: 108 (4) <- val
94800:00:33.021 PCI: attempt to write extended register: 10c (4) <- val
94900:00:33.021 PCI: attempt to write extended register: 110 (4) <- val
95000:00:33.021 PCI: attempt to write extended register: 114 (4) <- val
95100:00:33.021 PCI: attempt to write extended register: 118 (4) <- val
95200:00:33.021 PCI: attempt to write extended register: 11c (4) <- val
95300:00:33.021 PCI: attempt to write extended register: 120 (4) <- val
95400:00:33.021 PCI: attempt to write extended register: 124 (4) <- val
95500:00:33.021 PCI: attempt to write extended register: 128 (4) <- val
95600:00:33.021 PCI: attempt to write extended register: 12c (4) <- val
95700:00:33.021 PCI: attempt to write extended register: 130 (4) <- val
95800:00:33.021 PCI: attempt to write extended register: 134 (4) <- val
95900:00:33.021 PCI: attempt to write extended register: 138 (4) <- val
96000:00:33.021 PCI: attempt to write extended register: 13c (4) <- val
96100:00:33.021 PCI: attempt to write extended register: 140 (4) <- val
96200:00:33.021 PCI: attempt to write extended register: 144 (4) <- val
96300:00:33.021 PCI: attempt to write extended register: 148 (4) <- val
96400:00:33.021 PCI: attempt to write extended register: 14c (4) <- val
96500:00:33.021 PCI: attempt to write extended register: 150 (4) <- val
96600:00:33.021 PCI: attempt to write extended register: 154 (4) <- val
96700:00:33.021 PCI: attempt to write extended register: 158 (4) <- val
96800:00:33.021 PCI: attempt to write extended register: 15c (4) <- val
96900:00:33.021 PCI: attempt to write extended register: 160 (4) <- val
97000:00:33.021 PCI: attempt to write extended register: 164 (4) <- val
97100:00:33.021 PCI: attempt to write extended register: 168 (4) <- val
97200:00:33.021 PCI: attempt to write extended register: 16c (4) <- val
97300:00:33.021 PCI: attempt to write extended register: 170 (4) <- val
97400:00:33.021 PCI: attempt to write extended register: 174 (4) <- val
97500:00:33.021 PCI: attempt to write extended register: 178 (4) <- val
97600:00:33.021 PCI: attempt to write extended register: 17c (4) <- val
97700:00:33.021 PCI: attempt to write extended register: 180 (4) <- val
97800:00:33.021 PCI: attempt to write extended register: 184 (4) <- val
97900:00:33.021 PCI: attempt to write extended register: 188 (4) <- val
98000:00:33.021 PCI: attempt to write extended register: 18c (4) <- val
98100:00:33.021 PCI: attempt to write extended register: 190 (4) <- val
98200:00:33.021 PCI: attempt to write extended register: 194 (4) <- val
98300:00:33.021 PCI: attempt to write extended register: 198 (4) <- val
98400:00:33.021 PCI: attempt to write extended register: 19c (4) <- val
98500:00:33.021 PCI: attempt to write extended register: 1a0 (4) <- val
98600:00:33.021 PCI: attempt to write extended register: 1a4 (4) <- val
98700:00:33.021 PCI: attempt to write extended register: 1a8 (4) <- val
98800:00:33.021 PCI: attempt to write extended register: 1ac (4) <- val
98900:00:33.021 PCI: attempt to write extended register: 1b0 (4) <- val
99000:00:33.021 PCI: attempt to write extended register: 1b4 (4) <- val
99100:00:33.021 PCI: attempt to write extended register: 1b8 (4) <- val
99200:00:33.021 PCI: attempt to write extended register: 1bc (4) <- val
99300:00:33.021 PCI: attempt to write extended register: 1c0 (4) <- val
99400:00:33.021 PCI: attempt to write extended register: 1c4 (4) <- val
99500:00:33.021 PCI: attempt to write extended register: 1c8 (4) <- val
99600:00:33.021 PCI: attempt to write extended register: 1cc (4) <- val
99700:00:33.021 PCI: attempt to write extended register: 1d0 (4) <- val
99800:00:33.021 PCI: attempt to write extended register: 1d4 (4) <- val
99900:00:33.021 PCI: attempt to write extended register: 1d8 (4) <- val
100000:00:33.021 PCI: attempt to write extended register: 1dc (4) <- val
100100:00:33.021 PCI: attempt to write extended register: 1e0 (4) <- val
100200:00:33.021 PCI: attempt to write extended register: 1e4 (4) <- val
100300:00:33.021 PCI: attempt to write extended register: 1e8 (4) <- val
100400:00:33.021 PCI: attempt to write extended register: 1ec (4) <- val
100500:00:33.021 PCI: attempt to write extended register: 1f0 (4) <- val
100600:00:33.021 PCI: attempt to write extended register: 1f4 (4) <- val
100700:00:33.021 PCI: attempt to write extended register: 1f8 (4) <- val
100800:00:33.021 PCI: attempt to write extended register: 1fc (4) <- val
100900:00:33.021 PCI: attempt to write extended register: 200 (4) <- val
101000:00:33.021 PCI: attempt to write extended register: 204 (4) <- val
101100:00:33.021 PCI: attempt to write extended register: 208 (4) <- val
101200:00:33.021 PCI: attempt to write extended register: 20c (4) <- val
101300:00:33.021 PCI: attempt to write extended register: 210 (4) <- val
101400:00:33.021 PCI: attempt to write extended register: 214 (4) <- val
101500:00:33.021 PCI: attempt to write extended register: 218 (4) <- val
101600:00:33.021 PCI: attempt to write extended register: 21c (4) <- val
101700:00:33.021 PCI: attempt to write extended register: 220 (4) <- val
101800:00:33.021 PCI: attempt to write extended register: 224 (4) <- val
101900:00:33.021 PCI: attempt to write extended register: 228 (4) <- val
102000:00:33.021 PCI: attempt to write extended register: 22c (4) <- val
102100:00:33.021 PCI: attempt to write extended register: 230 (4) <- val
102200:00:33.021 PCI: attempt to write extended register: 234 (4) <- val
102300:00:33.021 PCI: attempt to write extended register: 238 (4) <- val
102400:00:33.021 PCI: attempt to write extended register: 23c (4) <- val
102500:00:33.021 PCI: attempt to write extended register: 240 (4) <- val
102600:00:33.021 PCI: attempt to write extended register: 244 (4) <- val
102700:00:33.021 PCI: attempt to write extended register: 248 (4) <- val
102800:00:33.021 PCI: attempt to write extended register: 24c (4) <- val
102900:00:33.021 PCI: attempt to write extended register: 250 (4) <- val
103000:00:33.021 PCI: attempt to write extended register: 254 (4) <- val
103100:00:33.021 PCI: attempt to write extended register: 258 (4) <- val
103200:00:33.021 PCI: attempt to write extended register: 25c (4) <- val
103300:00:33.021 PCI: attempt to write extended register: 260 (4) <- val
103400:00:33.021 PCI: attempt to write extended register: 264 (4) <- val
103500:00:33.021 PCI: attempt to write extended register: 268 (4) <- val
103600:00:33.021 PCI: attempt to write extended register: 26c (4) <- val
103700:00:33.021 PCI: attempt to write extended register: 270 (4) <- val
103800:00:33.021 PCI: attempt to write extended register: 274 (4) <- val
103900:00:33.021 PCI: attempt to write extended register: 278 (4) <- val
104000:00:33.021 PCI: attempt to write extended register: 27c (4) <- val
104100:00:33.021 PCI: attempt to write extended register: 280 (4) <- val
104200:00:33.021 PCI: attempt to write extended register: 284 (4) <- val
104300:00:33.021 PCI: attempt to write extended register: 288 (4) <- val
104400:00:33.021 PCI: attempt to write extended register: 28c (4) <- val
104500:00:33.021 PCI: attempt to write extended register: 290 (4) <- val
104600:00:33.021 PCI: attempt to write extended register: 294 (4) <- val
104700:00:33.021 PCI: attempt to write extended register: 298 (4) <- val
104800:00:33.021 PCI: attempt to write extended register: 29c (4) <- val
104900:00:33.021 PCI: attempt to write extended register: 2a0 (4) <- val
105000:00:33.021 PCI: attempt to write extended register: 2a4 (4) <- val
105100:00:33.021 PCI: attempt to write extended register: 2a8 (4) <- val
105200:00:33.021 PCI: attempt to write extended register: 2ac (4) <- val
105300:00:33.021 PCI: attempt to write extended register: 2b0 (4) <- val
105400:00:33.021 PCI: attempt to write extended register: 2b4 (4) <- val
105500:00:33.021 PCI: attempt to write extended register: 2b8 (4) <- val
105600:00:33.021 PCI: attempt to write extended register: 2bc (4) <- val
105700:00:33.021 PCI: attempt to write extended register: 2c0 (4) <- val
105800:00:33.021 PCI: attempt to write extended register: 2c4 (4) <- val
105900:00:33.021 PCI: attempt to write extended register: 2c8 (4) <- val
106000:00:33.021 PCI: attempt to write extended register: 2cc (4) <- val
106100:00:33.021 PCI: attempt to write extended register: 2d0 (4) <- val
106200:00:33.021 PCI: attempt to write extended register: 2d4 (4) <- val
106300:00:33.021 PCI: attempt to write extended register: 2d8 (4) <- val
106400:00:33.021 PCI: attempt to write extended register: 2dc (4) <- val
106500:00:33.021 PCI: attempt to write extended register: 2e0 (4) <- val
106600:00:33.021 PCI: attempt to write extended register: 2e4 (4) <- val
106700:00:33.021 PCI: attempt to write extended register: 2e8 (4) <- val
106800:00:33.021 PCI: attempt to write extended register: 2ec (4) <- val
106900:00:33.021 PCI: attempt to write extended register: 2f0 (4) <- val
107000:00:33.021 PCI: attempt to write extended register: 2f4 (4) <- val
107100:00:33.021 PCI: attempt to write extended register: 2f8 (4) <- val
107200:00:33.021 PCI: attempt to write extended register: 2fc (4) <- val
107300:00:33.021 PCI: attempt to write extended register: 300 (4) <- val
107400:00:33.021 PCI: attempt to write extended register: 304 (4) <- val
107500:00:33.021 PCI: attempt to write extended register: 308 (4) <- val
107600:00:33.021 PCI: attempt to write extended register: 30c (4) <- val
107700:00:33.021 PCI: attempt to write extended register: 310 (4) <- val
107800:00:33.021 PCI: attempt to write extended register: 314 (4) <- val
107900:00:33.021 PCI: attempt to write extended register: 318 (4) <- val
108000:00:33.021 PCI: attempt to write extended register: 31c (4) <- val
108100:00:33.021 PCI: attempt to write extended register: 320 (4) <- val
108200:00:33.021 PCI: attempt to write extended register: 324 (4) <- val
108300:00:33.021 PCI: attempt to write extended register: 328 (4) <- val
108400:00:33.021 PCI: attempt to write extended register: 32c (4) <- val
108500:00:33.021 PCI: attempt to write extended register: 330 (4) <- val
108600:00:33.021 PCI: attempt to write extended register: 334 (4) <- val
108700:00:33.021 PCI: attempt to write extended register: 338 (4) <- val
108800:00:33.021 PCI: attempt to write extended register: 33c (4) <- val
108900:00:33.021 PCI: attempt to write extended register: 340 (4) <- val
109000:00:33.021 PCI: attempt to write extended register: 344 (4) <- val
109100:00:33.021 PCI: attempt to write extended register: 348 (4) <- val
109200:00:33.021 PCI: attempt to write extended register: 34c (4) <- val
109300:00:33.021 PCI: attempt to write extended register: 350 (4) <- val
109400:00:33.021 PCI: attempt to write extended register: 354 (4) <- val
109500:00:33.021 PCI: attempt to write extended register: 358 (4) <- val
109600:00:33.021 PCI: attempt to write extended register: 35c (4) <- val
109700:00:33.021 PCI: attempt to write extended register: 360 (4) <- val
109800:00:33.021 PCI: attempt to write extended register: 364 (4) <- val
109900:00:33.021 PCI: attempt to write extended register: 368 (4) <- val
110000:00:33.021 PCI: attempt to write extended register: 36c (4) <- val
110100:00:33.021 PCI: attempt to write extended register: 370 (4) <- val
110200:00:33.021 PCI: attempt to write extended register: 374 (4) <- val
110300:00:33.021 PCI: attempt to write extended register: 378 (4) <- val
110400:00:33.022 PCI: attempt to write extended register: 37c (4) <- val
110500:00:33.022 PCI: attempt to write extended register: 380 (4) <- val
110600:00:33.022 PCI: attempt to write extended register: 384 (4) <- val
110700:00:33.022 PCI: attempt to write extended register: 388 (4) <- val
110800:00:33.022 PCI: attempt to write extended register: 38c (4) <- val
110900:00:33.022 PCI: attempt to write extended register: 390 (4) <- val
111000:00:33.022 PCI: attempt to write extended register: 394 (4) <- val
111100:00:33.022 PCI: attempt to write extended register: 398 (4) <- val
111200:00:33.022 PCI: attempt to write extended register: 39c (4) <- val
111300:00:33.022 PCI: attempt to write extended register: 3a0 (4) <- val
111400:00:33.022 PCI: attempt to write extended register: 3a4 (4) <- val
111500:00:33.022 PCI: attempt to write extended register: 3a8 (4) <- val
111600:00:33.022 PCI: attempt to write extended register: 3ac (4) <- val
111700:00:33.022 PCI: attempt to write extended register: 3b0 (4) <- val
111800:00:33.022 PCI: attempt to write extended register: 3b4 (4) <- val
111900:00:33.022 PCI: attempt to write extended register: 3b8 (4) <- val
112000:00:33.022 PCI: attempt to write extended register: 3bc (4) <- val
112100:00:33.022 PCI: attempt to write extended register: 3c0 (4) <- val
112200:00:33.022 PCI: attempt to write extended register: 3c4 (4) <- val
112300:00:33.022 PCI: attempt to write extended register: 3c8 (4) <- val
112400:00:33.022 PCI: attempt to write extended register: 3cc (4) <- val
112500:00:33.022 PCI: attempt to write extended register: 3d0 (4) <- val
112600:00:33.022 PCI: attempt to write extended register: 3d4 (4) <- val
112700:00:33.022 PCI: attempt to write extended register: 3d8 (4) <- val
112800:00:33.022 PCI: attempt to write extended register: 3dc (4) <- val
112900:00:33.022 PCI: attempt to write extended register: 3e0 (4) <- val
113000:00:33.022 PCI: attempt to write extended register: 3e4 (4) <- val
113100:00:33.022 PCI: attempt to write extended register: 3e8 (4) <- val
113200:00:33.022 PCI: attempt to write extended register: 3ec (4) <- val
113300:00:33.022 PCI: attempt to write extended register: 3f0 (4) <- val
113400:00:33.022 PCI: attempt to write extended register: 3f4 (4) <- val
113500:00:33.022 PCI: attempt to write extended register: 3f8 (4) <- val
113600:00:33.022 PCI: attempt to write extended register: 3fc (4) <- val
113700:00:33.022 PCI: attempt to write extended register: 400 (4) <- val
113800:00:33.022 PCI: attempt to write extended register: 404 (4) <- val
113900:00:33.022 PCI: attempt to write extended register: 408 (4) <- val
114000:00:33.022 PCI: attempt to write extended register: 40c (4) <- val
114100:00:33.022 PCI: attempt to write extended register: 410 (4) <- val
114200:00:33.022 PCI: attempt to write extended register: 414 (4) <- val
114300:00:33.022 PCI: attempt to write extended register: 418 (4) <- val
114400:00:33.022 PCI: attempt to write extended register: 41c (4) <- val
114500:00:33.022 PCI: attempt to write extended register: 420 (4) <- val
114600:00:33.022 PCI: attempt to write extended register: 424 (4) <- val
114700:00:33.022 PCI: attempt to write extended register: 428 (4) <- val
114800:00:33.022 PCI: attempt to write extended register: 42c (4) <- val
114900:00:33.022 PCI: attempt to write extended register: 430 (4) <- val
115000:00:33.022 PCI: attempt to write extended register: 434 (4) <- val
115100:00:33.022 PCI: attempt to write extended register: 438 (4) <- val
115200:00:33.022 PCI: attempt to write extended register: 43c (4) <- val
115300:00:33.022 PCI: attempt to write extended register: 440 (4) <- val
115400:00:33.022 PCI: attempt to write extended register: 444 (4) <- val
115500:00:33.022 PCI: attempt to write extended register: 448 (4) <- val
115600:00:33.022 PCI: attempt to write extended register: 44c (4) <- val
115700:00:33.022 PCI: attempt to write extended register: 450 (4) <- val
115800:00:33.022 PCI: attempt to write extended register: 454 (4) <- val
115900:00:33.022 PCI: attempt to write extended register: 458 (4) <- val
116000:00:33.022 PCI: attempt to write extended register: 45c (4) <- val
116100:00:33.022 PCI: attempt to write extended register: 460 (4) <- val
116200:00:33.022 PCI: attempt to write extended register: 464 (4) <- val
116300:00:33.022 PCI: attempt to write extended register: 468 (4) <- val
116400:00:33.022 PCI: attempt to write extended register: 46c (4) <- val
116500:00:33.022 PCI: attempt to write extended register: 470 (4) <- val
116600:00:33.022 PCI: attempt to write extended register: 474 (4) <- val
116700:00:33.022 PCI: attempt to write extended register: 478 (4) <- val
116800:00:33.022 PCI: attempt to write extended register: 47c (4) <- val
116900:00:33.022 PCI: attempt to write extended register: 480 (4) <- val
117000:00:33.022 PCI: attempt to write extended register: 484 (4) <- val
117100:00:33.022 PCI: attempt to write extended register: 488 (4) <- val
117200:00:33.022 PCI: attempt to write extended register: 48c (4) <- val
117300:00:33.022 PCI: attempt to write extended register: 490 (4) <- val
117400:00:33.022 PCI: attempt to write extended register: 494 (4) <- val
117500:00:33.022 PCI: attempt to write extended register: 498 (4) <- val
117600:00:33.022 PCI: attempt to write extended register: 49c (4) <- val
117700:00:33.022 PCI: attempt to write extended register: 4a0 (4) <- val
117800:00:33.022 PCI: attempt to write extended register: 4a4 (4) <- val
117900:00:33.022 PCI: attempt to write extended register: 4a8 (4) <- val
118000:00:33.022 PCI: attempt to write extended register: 4ac (4) <- val
118100:00:33.022 PCI: attempt to write extended register: 4b0 (4) <- val
118200:00:33.022 PCI: attempt to write extended register: 4b4 (4) <- val
118300:00:33.022 PCI: attempt to write extended register: 4b8 (4) <- val
118400:00:33.022 PCI: attempt to write extended register: 4bc (4) <- val
118500:00:33.022 PCI: attempt to write extended register: 4c0 (4) <- val
118600:00:33.022 PCI: attempt to write extended register: 4c4 (4) <- val
118700:00:33.022 PCI: attempt to write extended register: 4c8 (4) <- val
118800:00:33.022 PCI: attempt to write extended register: 4cc (4) <- val
118900:00:33.022 PCI: attempt to write extended register: 4d0 (4) <- val
119000:00:33.022 PCI: attempt to write extended register: 4d4 (4) <- val
119100:00:33.022 PCI: attempt to write extended register: 4d8 (4) <- val
119200:00:33.022 PCI: attempt to write extended register: 4dc (4) <- val
119300:00:33.022 PCI: attempt to write extended register: 4e0 (4) <- val
119400:00:33.022 PCI: attempt to write extended register: 4e4 (4) <- val
119500:00:33.022 PCI: attempt to write extended register: 4e8 (4) <- val
119600:00:33.022 PCI: attempt to write extended register: 4ec (4) <- val
119700:00:33.022 PCI: attempt to write extended register: 4f0 (4) <- val
119800:00:33.022 PCI: attempt to write extended register: 4f4 (4) <- val
119900:00:33.022 PCI: attempt to write extended register: 4f8 (4) <- val
120000:00:33.022 PCI: attempt to write extended register: 4fc (4) <- val
120100:00:33.022 PCI: attempt to write extended register: 500 (4) <- val
120200:00:33.022 PCI: attempt to write extended register: 504 (4) <- val
120300:00:33.022 PCI: attempt to write extended register: 508 (4) <- val
120400:00:33.022 PCI: attempt to write extended register: 50c (4) <- val
120500:00:33.022 PCI: attempt to write extended register: 510 (4) <- val
120600:00:33.022 PCI: attempt to write extended register: 514 (4) <- val
120700:00:33.022 PCI: attempt to write extended register: 518 (4) <- val
120800:00:33.022 PCI: attempt to write extended register: 51c (4) <- val
120900:00:33.022 PCI: attempt to write extended register: 520 (4) <- val
121000:00:33.022 PCI: attempt to write extended register: 524 (4) <- val
121100:00:33.022 PCI: attempt to write extended register: 528 (4) <- val
121200:00:33.022 PCI: attempt to write extended register: 52c (4) <- val
121300:00:33.022 PCI: attempt to write extended register: 530 (4) <- val
121400:00:33.022 PCI: attempt to write extended register: 534 (4) <- val
121500:00:33.022 PCI: attempt to write extended register: 538 (4) <- val
121600:00:33.022 PCI: attempt to write extended register: 53c (4) <- val
121700:00:33.022 PCI: attempt to write extended register: 540 (4) <- val
121800:00:33.022 PCI: attempt to write extended register: 544 (4) <- val
121900:00:33.022 PCI: attempt to write extended register: 548 (4) <- val
122000:00:33.022 PCI: attempt to write extended register: 54c (4) <- val
122100:00:33.022 PCI: attempt to write extended register: 550 (4) <- val
122200:00:33.022 PCI: attempt to write extended register: 554 (4) <- val
122300:00:33.022 PCI: attempt to write extended register: 558 (4) <- val
122400:00:33.022 PCI: attempt to write extended register: 55c (4) <- val
122500:00:33.022 PCI: attempt to write extended register: 560 (4) <- val
122600:00:33.022 PCI: attempt to write extended register: 564 (4) <- val
122700:00:33.022 PCI: attempt to write extended register: 568 (4) <- val
122800:00:33.022 PCI: attempt to write extended register: 56c (4) <- val
122900:00:33.022 PCI: attempt to write extended register: 570 (4) <- val
123000:00:33.022 PCI: attempt to write extended register: 574 (4) <- val
123100:00:33.022 PCI: attempt to write extended register: 578 (4) <- val
123200:00:33.022 PCI: attempt to write extended register: 57c (4) <- val
123300:00:33.022 PCI: attempt to write extended register: 580 (4) <- val
123400:00:33.022 PCI: attempt to write extended register: 584 (4) <- val
123500:00:33.022 PCI: attempt to write extended register: 588 (4) <- val
123600:00:33.022 PCI: attempt to write extended register: 58c (4) <- val
123700:00:33.022 PCI: attempt to write extended register: 590 (4) <- val
123800:00:33.022 PCI: attempt to write extended register: 594 (4) <- val
123900:00:33.022 PCI: attempt to write extended register: 598 (4) <- val
124000:00:33.022 PCI: attempt to write extended register: 59c (4) <- val
124100:00:33.022 PCI: attempt to write extended register: 5a0 (4) <- val
124200:00:33.022 PCI: attempt to write extended register: 5a4 (4) <- val
124300:00:33.022 PCI: attempt to write extended register: 5a8 (4) <- val
124400:00:33.022 PCI: attempt to write extended register: 5ac (4) <- val
124500:00:33.022 PCI: attempt to write extended register: 5b0 (4) <- val
124600:00:33.022 PCI: attempt to write extended register: 5b4 (4) <- val
124700:00:33.022 PCI: attempt to write extended register: 5b8 (4) <- val
124800:00:33.022 PCI: attempt to write extended register: 5bc (4) <- val
124900:00:33.022 PCI: attempt to write extended register: 5c0 (4) <- val
125000:00:33.022 PCI: attempt to write extended register: 5c4 (4) <- val
125100:00:33.022 PCI: attempt to write extended register: 5c8 (4) <- val
125200:00:33.022 PCI: attempt to write extended register: 5cc (4) <- val
125300:00:33.022 PCI: attempt to write extended register: 5d0 (4) <- val
125400:00:33.022 PCI: attempt to write extended register: 5d4 (4) <- val
125500:00:33.022 PCI: attempt to write extended register: 5d8 (4) <- val
125600:00:33.022 PCI: attempt to write extended register: 5dc (4) <- val
125700:00:33.022 PCI: attempt to write extended register: 5e0 (4) <- val
125800:00:33.022 PCI: attempt to write extended register: 5e4 (4) <- val
125900:00:33.022 PCI: attempt to write extended register: 5e8 (4) <- val
126000:00:33.022 PCI: attempt to write extended register: 5ec (4) <- val
126100:00:33.022 PCI: attempt to write extended register: 5f0 (4) <- val
126200:00:33.022 PCI: attempt to write extended register: 5f4 (4) <- val
126300:00:33.022 PCI: attempt to write extended register: 5f8 (4) <- val
126400:00:33.022 PCI: attempt to write extended register: 5fc (4) <- val
126500:00:33.022 PCI: attempt to write extended register: 600 (4) <- val
126600:00:33.022 PCI: attempt to write extended register: 604 (4) <- val
126700:00:33.022 PCI: attempt to write extended register: 608 (4) <- val
126800:00:33.022 PCI: attempt to write extended register: 60c (4) <- val
126900:00:33.022 PCI: attempt to write extended register: 610 (4) <- val
127000:00:33.022 PCI: attempt to write extended register: 614 (4) <- val
127100:00:33.022 PCI: attempt to write extended register: 618 (4) <- val
127200:00:33.022 PCI: attempt to write extended register: 61c (4) <- val
127300:00:33.022 PCI: attempt to write extended register: 620 (4) <- val
127400:00:33.022 PCI: attempt to write extended register: 624 (4) <- val
127500:00:33.022 PCI: attempt to write extended register: 628 (4) <- val
127600:00:33.022 PCI: attempt to write extended register: 62c (4) <- val
127700:00:33.022 PCI: attempt to write extended register: 630 (4) <- val
127800:00:33.022 PCI: attempt to write extended register: 634 (4) <- val
127900:00:33.022 PCI: attempt to write extended register: 638 (4) <- val
128000:00:33.022 PCI: attempt to write extended register: 63c (4) <- val
128100:00:33.022 PCI: attempt to write extended register: 640 (4) <- val
128200:00:33.022 PCI: attempt to write extended register: 644 (4) <- val
128300:00:33.022 PCI: attempt to write extended register: 648 (4) <- val
128400:00:33.022 PCI: attempt to write extended register: 64c (4) <- val
128500:00:33.022 PCI: attempt to write extended register: 650 (4) <- val
128600:00:33.022 PCI: attempt to write extended register: 654 (4) <- val
128700:00:33.022 PCI: attempt to write extended register: 658 (4) <- val
128800:00:33.022 PCI: attempt to write extended register: 65c (4) <- val
128900:00:33.022 PCI: attempt to write extended register: 660 (4) <- val
129000:00:33.022 PCI: attempt to write extended register: 664 (4) <- val
129100:00:33.022 PCI: attempt to write extended register: 668 (4) <- val
129200:00:33.022 PCI: attempt to write extended register: 66c (4) <- val
129300:00:33.022 PCI: attempt to write extended register: 670 (4) <- val
129400:00:33.022 PCI: attempt to write extended register: 674 (4) <- val
129500:00:33.022 PCI: attempt to write extended register: 678 (4) <- val
129600:00:33.022 PCI: attempt to write extended register: 67c (4) <- val
129700:00:33.022 PCI: attempt to write extended register: 680 (4) <- val
129800:00:33.022 PCI: attempt to write extended register: 684 (4) <- val
129900:00:33.022 PCI: attempt to write extended register: 688 (4) <- val
130000:00:33.022 PCI: attempt to write extended register: 68c (4) <- val
130100:00:33.022 PCI: attempt to write extended register: 690 (4) <- val
130200:00:33.022 PCI: attempt to write extended register: 694 (4) <- val
130300:00:33.022 PCI: attempt to write extended register: 698 (4) <- val
130400:00:33.022 PCI: attempt to write extended register: 69c (4) <- val
130500:00:33.022 PCI: attempt to write extended register: 6a0 (4) <- val
130600:00:33.022 PCI: attempt to write extended register: 6a4 (4) <- val
130700:00:33.022 PCI: attempt to write extended register: 6a8 (4) <- val
130800:00:33.022 PCI: attempt to write extended register: 6ac (4) <- val
130900:00:33.022 PCI: attempt to write extended register: 6b0 (4) <- val
131000:00:33.022 PCI: attempt to write extended register: 6b4 (4) <- val
131100:00:33.022 PCI: attempt to write extended register: 6b8 (4) <- val
131200:00:33.022 PCI: attempt to write extended register: 6bc (4) <- val
131300:00:33.022 PCI: attempt to write extended register: 6c0 (4) <- val
131400:00:33.022 PCI: attempt to write extended register: 6c4 (4) <- val
131500:00:33.022 PCI: attempt to write extended register: 6c8 (4) <- val
131600:00:33.022 PCI: attempt to write extended register: 6cc (4) <- val
131700:00:33.022 PCI: attempt to write extended register: 6d0 (4) <- val
131800:00:33.022 PCI: attempt to write extended register: 6d4 (4) <- val
131900:00:33.022 PCI: attempt to write extended register: 6d8 (4) <- val
132000:00:33.022 PCI: attempt to write extended register: 6dc (4) <- val
132100:00:33.022 PCI: attempt to write extended register: 6e0 (4) <- val
132200:00:33.022 PCI: attempt to write extended register: 6e4 (4) <- val
132300:00:33.022 PCI: attempt to write extended register: 6e8 (4) <- val
132400:00:33.022 PCI: attempt to write extended register: 6ec (4) <- val
132500:00:33.022 PCI: attempt to write extended register: 6f0 (4) <- val
132600:00:33.022 PCI: attempt to write extended register: 6f4 (4) <- val
132700:00:33.022 PCI: attempt to write extended register: 6f8 (4) <- val
132800:00:33.022 PCI: attempt to write extended register: 6fc (4) <- val
132900:00:33.022 PCI: attempt to write extended register: 700 (4) <- val
133000:00:33.022 PCI: attempt to write extended register: 704 (4) <- val
133100:00:33.022 PCI: attempt to write extended register: 708 (4) <- val
133200:00:33.022 PCI: attempt to write extended register: 70c (4) <- val
133300:00:33.022 PCI: attempt to write extended register: 710 (4) <- val
133400:00:33.022 PCI: attempt to write extended register: 714 (4) <- val
133500:00:33.022 PCI: attempt to write extended register: 718 (4) <- val
133600:00:33.022 PCI: attempt to write extended register: 71c (4) <- val
133700:00:33.022 PCI: attempt to write extended register: 720 (4) <- val
133800:00:33.022 PCI: attempt to write extended register: 724 (4) <- val
133900:00:33.022 PCI: attempt to write extended register: 728 (4) <- val
134000:00:33.022 PCI: attempt to write extended register: 72c (4) <- val
134100:00:33.022 PCI: attempt to write extended register: 730 (4) <- val
134200:00:33.023 PCI: attempt to write extended register: 734 (4) <- val
134300:00:33.023 PCI: attempt to write extended register: 738 (4) <- val
134400:00:33.023 PCI: attempt to write extended register: 73c (4) <- val
134500:00:33.023 PCI: attempt to write extended register: 740 (4) <- val
134600:00:33.023 PCI: attempt to write extended register: 744 (4) <- val
134700:00:33.023 PCI: attempt to write extended register: 748 (4) <- val
134800:00:33.023 PCI: attempt to write extended register: 74c (4) <- val
134900:00:33.023 PCI: attempt to write extended register: 750 (4) <- val
135000:00:33.023 PCI: attempt to write extended register: 754 (4) <- val
135100:00:33.023 PCI: attempt to write extended register: 758 (4) <- val
135200:00:33.023 PCI: attempt to write extended register: 75c (4) <- val
135300:00:33.023 PCI: attempt to write extended register: 760 (4) <- val
135400:00:33.023 PCI: attempt to write extended register: 764 (4) <- val
135500:00:33.023 PCI: attempt to write extended register: 768 (4) <- val
135600:00:33.023 PCI: attempt to write extended register: 76c (4) <- val
135700:00:33.023 PCI: attempt to write extended register: 770 (4) <- val
135800:00:33.023 PCI: attempt to write extended register: 774 (4) <- val
135900:00:33.023 PCI: attempt to write extended register: 778 (4) <- val
136000:00:33.023 PCI: attempt to write extended register: 77c (4) <- val
136100:00:33.023 PCI: attempt to write extended register: 780 (4) <- val
136200:00:33.023 PCI: attempt to write extended register: 784 (4) <- val
136300:00:33.023 PCI: attempt to write extended register: 788 (4) <- val
136400:00:33.023 PCI: attempt to write extended register: 78c (4) <- val
136500:00:33.023 PCI: attempt to write extended register: 790 (4) <- val
136600:00:33.023 PCI: attempt to write extended register: 794 (4) <- val
136700:00:33.023 PCI: attempt to write extended register: 798 (4) <- val
136800:00:33.023 PCI: attempt to write extended register: 79c (4) <- val
136900:00:33.023 PCI: attempt to write extended register: 7a0 (4) <- val
137000:00:33.023 PCI: attempt to write extended register: 7a4 (4) <- val
137100:00:33.023 PCI: attempt to write extended register: 7a8 (4) <- val
137200:00:33.023 PCI: attempt to write extended register: 7ac (4) <- val
137300:00:33.023 PCI: attempt to write extended register: 7b0 (4) <- val
137400:00:33.023 PCI: attempt to write extended register: 7b4 (4) <- val
137500:00:33.023 PCI: attempt to write extended register: 7b8 (4) <- val
137600:00:33.023 PCI: attempt to write extended register: 7bc (4) <- val
137700:00:33.023 PCI: attempt to write extended register: 7c0 (4) <- val
137800:00:33.023 PCI: attempt to write extended register: 7c4 (4) <- val
137900:00:33.023 PCI: attempt to write extended register: 7c8 (4) <- val
138000:00:33.023 PCI: attempt to write extended register: 7cc (4) <- val
138100:00:33.023 PCI: attempt to write extended register: 7d0 (4) <- val
138200:00:33.023 PCI: attempt to write extended register: 7d4 (4) <- val
138300:00:33.023 PCI: attempt to write extended register: 7d8 (4) <- val
138400:00:33.023 PCI: attempt to write extended register: 7dc (4) <- val
138500:00:33.023 PCI: attempt to write extended register: 7e0 (4) <- val
138600:00:33.023 PCI: attempt to write extended register: 7e4 (4) <- val
138700:00:33.023 PCI: attempt to write extended register: 7e8 (4) <- val
138800:00:33.023 PCI: attempt to write extended register: 7ec (4) <- val
138900:00:33.023 PCI: attempt to write extended register: 7f0 (4) <- val
139000:00:33.023 PCI: attempt to write extended register: 7f4 (4) <- val
139100:00:33.023 PCI: attempt to write extended register: 7f8 (4) <- val
139200:00:33.023 PCI: attempt to write extended register: 7fc (4) <- val
139300:00:33.023 PCI: attempt to write extended register: 800 (4) <- val
139400:00:33.023 PCI: attempt to write extended register: 804 (4) <- val
139500:00:33.023 PCI: attempt to write extended register: 808 (4) <- val
139600:00:33.023 PCI: attempt to write extended register: 80c (4) <- val
139700:00:33.023 PCI: attempt to write extended register: 810 (4) <- val
139800:00:33.023 PCI: attempt to write extended register: 814 (4) <- val
139900:00:33.023 PCI: attempt to write extended register: 818 (4) <- val
140000:00:33.023 PCI: attempt to write extended register: 81c (4) <- val
140100:00:33.023 PCI: attempt to write extended register: 820 (4) <- val
140200:00:33.023 PCI: attempt to write extended register: 824 (4) <- val
140300:00:33.023 PCI: attempt to write extended register: 828 (4) <- val
140400:00:33.023 PCI: attempt to write extended register: 82c (4) <- val
140500:00:33.023 PCI: attempt to write extended register: 830 (4) <- val
140600:00:33.023 PCI: attempt to write extended register: 834 (4) <- val
140700:00:33.023 PCI: attempt to write extended register: 838 (4) <- val
140800:00:33.023 PCI: attempt to write extended register: 83c (4) <- val
140900:00:33.023 PCI: attempt to write extended register: 840 (4) <- val
141000:00:33.023 PCI: attempt to write extended register: 844 (4) <- val
141100:00:33.023 PCI: attempt to write extended register: 848 (4) <- val
141200:00:33.023 PCI: attempt to write extended register: 84c (4) <- val
141300:00:33.023 PCI: attempt to write extended register: 850 (4) <- val
141400:00:33.023 PCI: attempt to write extended register: 854 (4) <- val
141500:00:33.023 PCI: attempt to write extended register: 858 (4) <- val
141600:00:33.023 PCI: attempt to write extended register: 85c (4) <- val
141700:00:33.023 PCI: attempt to write extended register: 860 (4) <- val
141800:00:33.023 PCI: attempt to write extended register: 864 (4) <- val
141900:00:33.023 PCI: attempt to write extended register: 868 (4) <- val
142000:00:33.023 PCI: attempt to write extended register: 86c (4) <- val
142100:00:33.023 PCI: attempt to write extended register: 870 (4) <- val
142200:00:33.023 PCI: attempt to write extended register: 874 (4) <- val
142300:00:33.023 PCI: attempt to write extended register: 878 (4) <- val
142400:00:33.023 PCI: attempt to write extended register: 87c (4) <- val
142500:00:33.023 PCI: attempt to write extended register: 880 (4) <- val
142600:00:33.023 PCI: attempt to write extended register: 884 (4) <- val
142700:00:33.023 PCI: attempt to write extended register: 888 (4) <- val
142800:00:33.023 PCI: attempt to write extended register: 88c (4) <- val
142900:00:33.023 PCI: attempt to write extended register: 890 (4) <- val
143000:00:33.023 PCI: attempt to write extended register: 894 (4) <- val
143100:00:33.023 PCI: attempt to write extended register: 898 (4) <- val
143200:00:33.023 PCI: attempt to write extended register: 89c (4) <- val
143300:00:33.023 PCI: attempt to write extended register: 8a0 (4) <- val
143400:00:33.023 PCI: attempt to write extended register: 8a4 (4) <- val
143500:00:33.023 PCI: attempt to write extended register: 8a8 (4) <- val
143600:00:33.023 PCI: attempt to write extended register: 8ac (4) <- val
143700:00:33.023 PCI: attempt to write extended register: 8b0 (4) <- val
143800:00:33.023 PCI: attempt to write extended register: 8b4 (4) <- val
143900:00:33.023 PCI: attempt to write extended register: 8b8 (4) <- val
144000:00:33.023 PCI: attempt to write extended register: 8bc (4) <- val
144100:00:33.023 PCI: attempt to write extended register: 8c0 (4) <- val
144200:00:33.023 PCI: attempt to write extended register: 8c4 (4) <- val
144300:00:33.023 PCI: attempt to write extended register: 8c8 (4) <- val
144400:00:33.023 PCI: attempt to write extended register: 8cc (4) <- val
144500:00:33.023 PCI: attempt to write extended register: 8d0 (4) <- val
144600:00:33.023 PCI: attempt to write extended register: 8d4 (4) <- val
144700:00:33.023 PCI: attempt to write extended register: 8d8 (4) <- val
144800:00:33.023 PCI: attempt to write extended register: 8dc (4) <- val
144900:00:33.023 PCI: attempt to write extended register: 8e0 (4) <- val
145000:00:33.023 PCI: attempt to write extended register: 8e4 (4) <- val
145100:00:33.023 PCI: attempt to write extended register: 8e8 (4) <- val
145200:00:33.023 PCI: attempt to write extended register: 8ec (4) <- val
145300:00:33.023 PCI: attempt to write extended register: 8f0 (4) <- val
145400:00:33.023 PCI: attempt to write extended register: 8f4 (4) <- val
145500:00:33.023 PCI: attempt to write extended register: 8f8 (4) <- val
145600:00:33.023 PCI: attempt to write extended register: 8fc (4) <- val
145700:00:33.023 PCI: attempt to write extended register: 900 (4) <- val
145800:00:33.023 PCI: attempt to write extended register: 904 (4) <- val
145900:00:33.023 PCI: attempt to write extended register: 908 (4) <- val
146000:00:33.023 PCI: attempt to write extended register: 90c (4) <- val
146100:00:33.023 PCI: attempt to write extended register: 910 (4) <- val
146200:00:33.023 PCI: attempt to write extended register: 914 (4) <- val
146300:00:33.023 PCI: attempt to write extended register: 918 (4) <- val
146400:00:33.023 PCI: attempt to write extended register: 91c (4) <- val
146500:00:33.023 PCI: attempt to write extended register: 920 (4) <- val
146600:00:33.023 PCI: attempt to write extended register: 924 (4) <- val
146700:00:33.023 PCI: attempt to write extended register: 928 (4) <- val
146800:00:33.023 PCI: attempt to write extended register: 92c (4) <- val
146900:00:33.023 PCI: attempt to write extended register: 930 (4) <- val
147000:00:33.023 PCI: attempt to write extended register: 934 (4) <- val
147100:00:33.023 PCI: attempt to write extended register: 938 (4) <- val
147200:00:33.023 PCI: attempt to write extended register: 93c (4) <- val
147300:00:33.023 PCI: attempt to write extended register: 940 (4) <- val
147400:00:33.023 PCI: attempt to write extended register: 944 (4) <- val
147500:00:33.023 PCI: attempt to write extended register: 948 (4) <- val
147600:00:33.023 PCI: attempt to write extended register: 94c (4) <- val
147700:00:33.023 PCI: attempt to write extended register: 950 (4) <- val
147800:00:33.023 PCI: attempt to write extended register: 954 (4) <- val
147900:00:33.023 PCI: attempt to write extended register: 958 (4) <- val
148000:00:33.023 PCI: attempt to write extended register: 95c (4) <- val
148100:00:33.023 PCI: attempt to write extended register: 960 (4) <- val
148200:00:33.023 PCI: attempt to write extended register: 964 (4) <- val
148300:00:33.023 PCI: attempt to write extended register: 968 (4) <- val
148400:00:33.023 PCI: attempt to write extended register: 96c (4) <- val
148500:00:33.023 PCI: attempt to write extended register: 970 (4) <- val
148600:00:33.023 PCI: attempt to write extended register: 974 (4) <- val
148700:00:33.023 PCI: attempt to write extended register: 978 (4) <- val
148800:00:33.023 PCI: attempt to write extended register: 97c (4) <- val
148900:00:33.023 PCI: attempt to write extended register: 980 (4) <- val
149000:00:33.023 PCI: attempt to write extended register: 984 (4) <- val
149100:00:33.023 PCI: attempt to write extended register: 988 (4) <- val
149200:00:33.023 PCI: attempt to write extended register: 98c (4) <- val
149300:00:33.023 PCI: attempt to write extended register: 990 (4) <- val
149400:00:33.023 PCI: attempt to write extended register: 994 (4) <- val
149500:00:33.023 PCI: attempt to write extended register: 998 (4) <- val
149600:00:33.023 PCI: attempt to write extended register: 99c (4) <- val
149700:00:33.023 PCI: attempt to write extended register: 9a0 (4) <- val
149800:00:33.023 PCI: attempt to write extended register: 9a4 (4) <- val
149900:00:33.023 PCI: attempt to write extended register: 9a8 (4) <- val
150000:00:33.023 PCI: attempt to write extended register: 9ac (4) <- val
150100:00:33.023 PCI: attempt to write extended register: 9b0 (4) <- val
150200:00:33.023 PCI: attempt to write extended register: 9b4 (4) <- val
150300:00:33.023 PCI: attempt to write extended register: 9b8 (4) <- val
150400:00:33.023 PCI: attempt to write extended register: 9bc (4) <- val
150500:00:33.023 PCI: attempt to write extended register: 9c0 (4) <- val
150600:00:33.023 PCI: attempt to write extended register: 9c4 (4) <- val
150700:00:33.023 PCI: attempt to write extended register: 9c8 (4) <- val
150800:00:33.023 PCI: attempt to write extended register: 9cc (4) <- val
150900:00:33.023 PCI: attempt to write extended register: 9d0 (4) <- val
151000:00:33.023 PCI: attempt to write extended register: 9d4 (4) <- val
151100:00:33.023 PCI: attempt to write extended register: 9d8 (4) <- val
151200:00:33.023 PCI: attempt to write extended register: 9dc (4) <- val
151300:00:33.023 PCI: attempt to write extended register: 9e0 (4) <- val
151400:00:33.023 PCI: attempt to write extended register: 9e4 (4) <- val
151500:00:33.023 PCI: attempt to write extended register: 9e8 (4) <- val
151600:00:33.023 PCI: attempt to write extended register: 9ec (4) <- val
151700:00:33.023 PCI: attempt to write extended register: 9f0 (4) <- val
151800:00:33.023 PCI: attempt to write extended register: 9f4 (4) <- val
151900:00:33.023 PCI: attempt to write extended register: 9f8 (4) <- val
152000:00:33.023 PCI: attempt to write extended register: 9fc (4) <- val
152100:00:33.023 PCI: attempt to write extended register: a00 (4) <- val
152200:00:33.023 PCI: attempt to write extended register: a04 (4) <- val
152300:00:33.023 PCI: attempt to write extended register: a08 (4) <- val
152400:00:33.023 PCI: attempt to write extended register: a0c (4) <- val
152500:00:33.023 PCI: attempt to write extended register: a10 (4) <- val
152600:00:33.023 PCI: attempt to write extended register: a14 (4) <- val
152700:00:33.023 PCI: attempt to write extended register: a18 (4) <- val
152800:00:33.023 PCI: attempt to write extended register: a1c (4) <- val
152900:00:33.023 PCI: attempt to write extended register: a20 (4) <- val
153000:00:33.023 PCI: attempt to write extended register: a24 (4) <- val
153100:00:33.023 PCI: attempt to write extended register: a28 (4) <- val
153200:00:33.023 PCI: attempt to write extended register: a2c (4) <- val
153300:00:33.023 PCI: attempt to write extended register: a30 (4) <- val
153400:00:33.023 PCI: attempt to write extended register: a34 (4) <- val
153500:00:33.023 PCI: attempt to write extended register: a38 (4) <- val
153600:00:33.023 PCI: attempt to write extended register: a3c (4) <- val
153700:00:33.023 PCI: attempt to write extended register: a40 (4) <- val
153800:00:33.023 PCI: attempt to write extended register: a44 (4) <- val
153900:00:33.023 PCI: attempt to write extended register: a48 (4) <- val
154000:00:33.023 PCI: attempt to write extended register: a4c (4) <- val
154100:00:33.023 PCI: attempt to write extended register: a50 (4) <- val
154200:00:33.023 PCI: attempt to write extended register: a54 (4) <- val
154300:00:33.023 PCI: attempt to write extended register: a58 (4) <- val
154400:00:33.023 PCI: attempt to write extended register: a5c (4) <- val
154500:00:33.023 PCI: attempt to write extended register: a60 (4) <- val
154600:00:33.023 PCI: attempt to write extended register: a64 (4) <- val
154700:00:33.023 PCI: attempt to write extended register: a68 (4) <- val
154800:00:33.023 PCI: attempt to write extended register: a6c (4) <- val
154900:00:33.023 PCI: attempt to write extended register: a70 (4) <- val
155000:00:33.023 PCI: attempt to write extended register: a74 (4) <- val
155100:00:33.023 PCI: attempt to write extended register: a78 (4) <- val
155200:00:33.023 PCI: attempt to write extended register: a7c (4) <- val
155300:00:33.023 PCI: attempt to write extended register: a80 (4) <- val
155400:00:33.023 PCI: attempt to write extended register: a84 (4) <- val
155500:00:33.023 PCI: attempt to write extended register: a88 (4) <- val
155600:00:33.023 PCI: attempt to write extended register: a8c (4) <- val
155700:00:33.023 PCI: attempt to write extended register: a90 (4) <- val
155800:00:33.023 PCI: attempt to write extended register: a94 (4) <- val
155900:00:33.023 PCI: attempt to write extended register: a98 (4) <- val
156000:00:33.023 PCI: attempt to write extended register: a9c (4) <- val
156100:00:33.023 PCI: attempt to write extended register: aa0 (4) <- val
156200:00:33.023 PCI: attempt to write extended register: aa4 (4) <- val
156300:00:33.023 PCI: attempt to write extended register: aa8 (4) <- val
156400:00:33.023 PCI: attempt to write extended register: aac (4) <- val
156500:00:33.023 PCI: attempt to write extended register: ab0 (4) <- val
156600:00:33.023 PCI: attempt to write extended register: ab4 (4) <- val
156700:00:33.023 PCI: attempt to write extended register: ab8 (4) <- val
156800:00:33.023 PCI: attempt to write extended register: abc (4) <- val
156900:00:33.023 PCI: attempt to write extended register: ac0 (4) <- val
157000:00:33.023 PCI: attempt to write extended register: ac4 (4) <- val
157100:00:33.023 PCI: attempt to write extended register: ac8 (4) <- val
157200:00:33.023 PCI: attempt to write extended register: acc (4) <- val
157300:00:33.023 PCI: attempt to write extended register: ad0 (4) <- val
157400:00:33.023 PCI: attempt to write extended register: ad4 (4) <- val
157500:00:33.023 PCI: attempt to write extended register: ad8 (4) <- val
157600:00:33.023 PCI: attempt to write extended register: adc (4) <- val
157700:00:33.023 PCI: attempt to write extended register: ae0 (4) <- val
157800:00:33.023 PCI: attempt to write extended register: ae4 (4) <- val
157900:00:33.023 PCI: attempt to write extended register: ae8 (4) <- val
158000:00:33.023 PCI: attempt to write extended register: aec (4) <- val
158100:00:33.023 PCI: attempt to write extended register: af0 (4) <- val
158200:00:33.023 PCI: attempt to write extended register: af4 (4) <- val
158300:00:33.023 PCI: attempt to write extended register: af8 (4) <- val
158400:00:33.023 PCI: attempt to write extended register: afc (4) <- val
158500:00:33.023 PCI: attempt to write extended register: b00 (4) <- val
158600:00:33.023 PCI: attempt to write extended register: b04 (4) <- val
158700:00:33.023 PCI: attempt to write extended register: b08 (4) <- val
158800:00:33.023 PCI: attempt to write extended register: b0c (4) <- val
158900:00:33.023 PCI: attempt to write extended register: b10 (4) <- val
159000:00:33.023 PCI: attempt to write extended register: b14 (4) <- val
159100:00:33.023 PCI: attempt to write extended register: b18 (4) <- val
159200:00:33.023 PCI: attempt to write extended register: b1c (4) <- val
159300:00:33.023 PCI: attempt to write extended register: b20 (4) <- val
159400:00:33.023 PCI: attempt to write extended register: b24 (4) <- val
159500:00:33.023 PCI: attempt to write extended register: b28 (4) <- val
159600:00:33.023 PCI: attempt to write extended register: b2c (4) <- val
159700:00:33.023 PCI: attempt to write extended register: b30 (4) <- val
159800:00:33.023 PCI: attempt to write extended register: b34 (4) <- val
159900:00:33.023 PCI: attempt to write extended register: b38 (4) <- val
160000:00:33.023 PCI: attempt to write extended register: b3c (4) <- val
160100:00:33.023 PCI: attempt to write extended register: b40 (4) <- val
160200:00:33.023 PCI: attempt to write extended register: b44 (4) <- val
160300:00:33.023 PCI: attempt to write extended register: b48 (4) <- val
160400:00:33.023 PCI: attempt to write extended register: b4c (4) <- val
160500:00:33.023 PCI: attempt to write extended register: b50 (4) <- val
160600:00:33.023 PCI: attempt to write extended register: b54 (4) <- val
160700:00:33.024 PCI: attempt to write extended register: b58 (4) <- val
160800:00:33.024 PCI: attempt to write extended register: b5c (4) <- val
160900:00:33.024 PCI: attempt to write extended register: b60 (4) <- val
161000:00:33.024 PCI: attempt to write extended register: b64 (4) <- val
161100:00:33.024 PCI: attempt to write extended register: b68 (4) <- val
161200:00:33.024 PCI: attempt to write extended register: b6c (4) <- val
161300:00:33.024 PCI: attempt to write extended register: b70 (4) <- val
161400:00:33.024 PCI: attempt to write extended register: b74 (4) <- val
161500:00:33.024 PCI: attempt to write extended register: b78 (4) <- val
161600:00:33.024 PCI: attempt to write extended register: b7c (4) <- val
161700:00:33.024 PCI: attempt to write extended register: b80 (4) <- val
161800:00:33.024 PCI: attempt to write extended register: b84 (4) <- val
161900:00:33.024 PCI: attempt to write extended register: b88 (4) <- val
162000:00:33.024 PCI: attempt to write extended register: b8c (4) <- val
162100:00:33.024 PCI: attempt to write extended register: b90 (4) <- val
162200:00:33.024 PCI: attempt to write extended register: b94 (4) <- val
162300:00:33.024 PCI: attempt to write extended register: b98 (4) <- val
162400:00:33.024 PCI: attempt to write extended register: b9c (4) <- val
162500:00:33.024 PCI: attempt to write extended register: ba0 (4) <- val
162600:00:33.024 PCI: attempt to write extended register: ba4 (4) <- val
162700:00:33.024 PCI: attempt to write extended register: ba8 (4) <- val
162800:00:33.024 PCI: attempt to write extended register: bac (4) <- val
162900:00:33.024 PCI: attempt to write extended register: bb0 (4) <- val
163000:00:33.024 PCI: attempt to write extended register: bb4 (4) <- val
163100:00:33.024 PCI: attempt to write extended register: bb8 (4) <- val
163200:00:33.024 PCI: attempt to write extended register: bbc (4) <- val
163300:00:33.024 PCI: attempt to write extended register: bc0 (4) <- val
163400:00:33.024 PCI: attempt to write extended register: bc4 (4) <- val
163500:00:33.024 PCI: attempt to write extended register: bc8 (4) <- val
163600:00:33.024 PCI: attempt to write extended register: bcc (4) <- val
163700:00:33.024 PCI: attempt to write extended register: bd0 (4) <- val
163800:00:33.024 PCI: attempt to write extended register: bd4 (4) <- val
163900:00:33.024 PCI: attempt to write extended register: bd8 (4) <- val
164000:00:33.024 PCI: attempt to write extended register: bdc (4) <- val
164100:00:33.024 PCI: attempt to write extended register: be0 (4) <- val
164200:00:33.024 PCI: attempt to write extended register: be4 (4) <- val
164300:00:33.024 PCI: attempt to write extended register: be8 (4) <- val
164400:00:33.024 PCI: attempt to write extended register: bec (4) <- val
164500:00:33.024 PCI: attempt to write extended register: bf0 (4) <- val
164600:00:33.024 PCI: attempt to write extended register: bf4 (4) <- val
164700:00:33.024 PCI: attempt to write extended register: bf8 (4) <- val
164800:00:33.024 PCI: attempt to write extended register: bfc (4) <- val
164900:00:33.024 PCI: attempt to write extended register: c00 (4) <- val
165000:00:33.024 PCI: attempt to write extended register: c04 (4) <- val
165100:00:33.024 PCI: attempt to write extended register: c08 (4) <- val
165200:00:33.024 PCI: attempt to write extended register: c0c (4) <- val
165300:00:33.024 PCI: attempt to write extended register: c10 (4) <- val
165400:00:33.024 PCI: attempt to write extended register: c14 (4) <- val
165500:00:33.024 PCI: attempt to write extended register: c18 (4) <- val
165600:00:33.024 PCI: attempt to write extended register: c1c (4) <- val
165700:00:33.024 PCI: attempt to write extended register: c20 (4) <- val
165800:00:33.024 PCI: attempt to write extended register: c24 (4) <- val
165900:00:33.024 PCI: attempt to write extended register: c28 (4) <- val
166000:00:33.024 PCI: attempt to write extended register: c2c (4) <- val
166100:00:33.024 PCI: attempt to write extended register: c30 (4) <- val
166200:00:33.024 PCI: attempt to write extended register: c34 (4) <- val
166300:00:33.024 PCI: attempt to write extended register: c38 (4) <- val
166400:00:33.024 PCI: attempt to write extended register: c3c (4) <- val
166500:00:33.024 PCI: attempt to write extended register: c40 (4) <- val
166600:00:33.024 PCI: attempt to write extended register: c44 (4) <- val
166700:00:33.024 PCI: attempt to write extended register: c48 (4) <- val
166800:00:33.024 PCI: attempt to write extended register: c4c (4) <- val
166900:00:33.024 PCI: attempt to write extended register: c50 (4) <- val
167000:00:33.024 PCI: attempt to write extended register: c54 (4) <- val
167100:00:33.024 PCI: attempt to write extended register: c58 (4) <- val
167200:00:33.024 PCI: attempt to write extended register: c5c (4) <- val
167300:00:33.024 PCI: attempt to write extended register: c60 (4) <- val
167400:00:33.024 PCI: attempt to write extended register: c64 (4) <- val
167500:00:33.024 PCI: attempt to write extended register: c68 (4) <- val
167600:00:33.024 PCI: attempt to write extended register: c6c (4) <- val
167700:00:33.024 PCI: attempt to write extended register: c70 (4) <- val
167800:00:33.024 PCI: attempt to write extended register: c74 (4) <- val
167900:00:33.024 PCI: attempt to write extended register: c78 (4) <- val
168000:00:33.024 PCI: attempt to write extended register: c7c (4) <- val
168100:00:33.024 PCI: attempt to write extended register: c80 (4) <- val
168200:00:33.024 PCI: attempt to write extended register: c84 (4) <- val
168300:00:33.024 PCI: attempt to write extended register: c88 (4) <- val
168400:00:33.024 PCI: attempt to write extended register: c8c (4) <- val
168500:00:33.024 PCI: attempt to write extended register: c90 (4) <- val
168600:00:33.024 PCI: attempt to write extended register: c94 (4) <- val
168700:00:33.024 PCI: attempt to write extended register: c98 (4) <- val
168800:00:33.024 PCI: attempt to write extended register: c9c (4) <- val
168900:00:33.024 PCI: attempt to write extended register: ca0 (4) <- val
169000:00:33.024 PCI: attempt to write extended register: ca4 (4) <- val
169100:00:33.024 PCI: attempt to write extended register: ca8 (4) <- val
169200:00:33.024 PCI: attempt to write extended register: cac (4) <- val
169300:00:33.024 PCI: attempt to write extended register: cb0 (4) <- val
169400:00:33.024 PCI: attempt to write extended register: cb4 (4) <- val
169500:00:33.024 PCI: attempt to write extended register: cb8 (4) <- val
169600:00:33.024 PCI: attempt to write extended register: cbc (4) <- val
169700:00:33.024 PCI: attempt to write extended register: cc0 (4) <- val
169800:00:33.024 PCI: attempt to write extended register: cc4 (4) <- val
169900:00:33.024 PCI: attempt to write extended register: cc8 (4) <- val
170000:00:33.024 PCI: attempt to write extended register: ccc (4) <- val
170100:00:33.024 PCI: attempt to write extended register: cd0 (4) <- val
170200:00:33.024 PCI: attempt to write extended register: cd4 (4) <- val
170300:00:33.024 PCI: attempt to write extended register: cd8 (4) <- val
170400:00:33.024 PCI: attempt to write extended register: cdc (4) <- val
170500:00:33.024 PCI: attempt to write extended register: ce0 (4) <- val
170600:00:33.024 PCI: attempt to write extended register: ce4 (4) <- val
170700:00:33.024 PCI: attempt to write extended register: ce8 (4) <- val
170800:00:33.024 PCI: attempt to write extended register: cec (4) <- val
170900:00:33.024 PCI: attempt to write extended register: cf0 (4) <- val
171000:00:33.024 PCI: attempt to write extended register: cf4 (4) <- val
171100:00:33.024 PCI: attempt to write extended register: cf8 (4) <- val
171200:00:33.024 PCI: attempt to write extended register: cfc (4) <- val
171300:00:33.024 PCI: attempt to write extended register: d00 (4) <- val
171400:00:33.024 PCI: attempt to write extended register: d04 (4) <- val
171500:00:33.024 PCI: attempt to write extended register: d08 (4) <- val
171600:00:33.024 PCI: attempt to write extended register: d0c (4) <- val
171700:00:33.024 PCI: attempt to write extended register: d10 (4) <- val
171800:00:33.024 PCI: attempt to write extended register: d14 (4) <- val
171900:00:33.024 PCI: attempt to write extended register: d18 (4) <- val
172000:00:33.024 PCI: attempt to write extended register: d1c (4) <- val
172100:00:33.024 PCI: attempt to write extended register: d20 (4) <- val
172200:00:33.024 PCI: attempt to write extended register: d24 (4) <- val
172300:00:33.024 PCI: attempt to write extended register: d28 (4) <- val
172400:00:33.024 PCI: attempt to write extended register: d2c (4) <- val
172500:00:33.024 PCI: attempt to write extended register: d30 (4) <- val
172600:00:33.024 PCI: attempt to write extended register: d34 (4) <- val
172700:00:33.024 PCI: attempt to write extended register: d38 (4) <- val
172800:00:33.024 PCI: attempt to write extended register: d3c (4) <- val
172900:00:33.024 PCI: attempt to write extended register: d40 (4) <- val
173000:00:33.024 PCI: attempt to write extended register: d44 (4) <- val
173100:00:33.024 PCI: attempt to write extended register: d48 (4) <- val
173200:00:33.024 PCI: attempt to write extended register: d4c (4) <- val
173300:00:33.024 PCI: attempt to write extended register: d50 (4) <- val
173400:00:33.024 PCI: attempt to write extended register: d54 (4) <- val
173500:00:33.024 PCI: attempt to write extended register: d58 (4) <- val
173600:00:33.024 PCI: attempt to write extended register: d5c (4) <- val
173700:00:33.024 PCI: attempt to write extended register: d60 (4) <- val
173800:00:33.024 PCI: attempt to write extended register: d64 (4) <- val
173900:00:33.024 PCI: attempt to write extended register: d68 (4) <- val
174000:00:33.024 PCI: attempt to write extended register: d6c (4) <- val
174100:00:33.024 PCI: attempt to write extended register: d70 (4) <- val
174200:00:33.024 PCI: attempt to write extended register: d74 (4) <- val
174300:00:33.024 PCI: attempt to write extended register: d78 (4) <- val
174400:00:33.024 PCI: attempt to write extended register: d7c (4) <- val
174500:00:33.024 PCI: attempt to write extended register: d80 (4) <- val
174600:00:33.024 PCI: attempt to write extended register: d84 (4) <- val
174700:00:33.024 PCI: attempt to write extended register: d88 (4) <- val
174800:00:33.024 PCI: attempt to write extended register: d8c (4) <- val
174900:00:33.024 PCI: attempt to write extended register: d90 (4) <- val
175000:00:33.024 PCI: attempt to write extended register: d94 (4) <- val
175100:00:33.024 PCI: attempt to write extended register: d98 (4) <- val
175200:00:33.024 PCI: attempt to write extended register: d9c (4) <- val
175300:00:33.024 PCI: attempt to write extended register: da0 (4) <- val
175400:00:33.024 PCI: attempt to write extended register: da4 (4) <- val
175500:00:33.024 PCI: attempt to write extended register: da8 (4) <- val
175600:00:33.024 PCI: attempt to write extended register: dac (4) <- val
175700:00:33.024 PCI: attempt to write extended register: db0 (4) <- val
175800:00:33.024 PCI: attempt to write extended register: db4 (4) <- val
175900:00:33.024 PCI: attempt to write extended register: db8 (4) <- val
176000:00:33.024 PCI: attempt to write extended register: dbc (4) <- val
176100:00:33.024 PCI: attempt to write extended register: dc0 (4) <- val
176200:00:33.024 PCI: attempt to write extended register: dc4 (4) <- val
176300:00:33.024 PCI: attempt to write extended register: dc8 (4) <- val
176400:00:33.024 PCI: attempt to write extended register: dcc (4) <- val
176500:00:33.024 PCI: attempt to write extended register: dd0 (4) <- val
176600:00:33.024 PCI: attempt to write extended register: dd4 (4) <- val
176700:00:33.024 PCI: attempt to write extended register: dd8 (4) <- val
176800:00:33.024 PCI: attempt to write extended register: ddc (4) <- val
176900:00:33.024 PCI: attempt to write extended register: de0 (4) <- val
177000:00:33.024 PCI: attempt to write extended register: de4 (4) <- val
177100:00:33.024 PCI: attempt to write extended register: de8 (4) <- val
177200:00:33.024 PCI: attempt to write extended register: dec (4) <- val
177300:00:33.024 PCI: attempt to write extended register: df0 (4) <- val
177400:00:33.024 PCI: attempt to write extended register: df4 (4) <- val
177500:00:33.024 PCI: attempt to write extended register: df8 (4) <- val
177600:00:33.024 PCI: attempt to write extended register: dfc (4) <- val
177700:00:33.024 PCI: attempt to write extended register: e00 (4) <- val
177800:00:33.024 PCI: attempt to write extended register: e04 (4) <- val
177900:00:33.024 PCI: attempt to write extended register: e08 (4) <- val
178000:00:33.024 PCI: attempt to write extended register: e0c (4) <- val
178100:00:33.024 PCI: attempt to write extended register: e10 (4) <- val
178200:00:33.024 PCI: attempt to write extended register: e14 (4) <- val
178300:00:33.024 PCI: attempt to write extended register: e18 (4) <- val
178400:00:33.024 PCI: attempt to write extended register: e1c (4) <- val
178500:00:33.024 PCI: attempt to write extended register: e20 (4) <- val
178600:00:33.024 PCI: attempt to write extended register: e24 (4) <- val
178700:00:33.024 PCI: attempt to write extended register: e28 (4) <- val
178800:00:33.024 PCI: attempt to write extended register: e2c (4) <- val
178900:00:33.024 PCI: attempt to write extended register: e30 (4) <- val
179000:00:33.024 PCI: attempt to write extended register: e34 (4) <- val
179100:00:33.024 PCI: attempt to write extended register: e38 (4) <- val
179200:00:33.024 PCI: attempt to write extended register: e3c (4) <- val
179300:00:33.024 PCI: attempt to write extended register: e40 (4) <- val
179400:00:33.024 PCI: attempt to write extended register: e44 (4) <- val
179500:00:33.024 PCI: attempt to write extended register: e48 (4) <- val
179600:00:33.024 PCI: attempt to write extended register: e4c (4) <- val
179700:00:33.024 PCI: attempt to write extended register: e50 (4) <- val
179800:00:33.024 PCI: attempt to write extended register: e54 (4) <- val
179900:00:33.024 PCI: attempt to write extended register: e58 (4) <- val
180000:00:33.024 PCI: attempt to write extended register: e5c (4) <- val
180100:00:33.024 PCI: attempt to write extended register: e60 (4) <- val
180200:00:33.024 PCI: attempt to write extended register: e64 (4) <- val
180300:00:33.024 PCI: attempt to write extended register: e68 (4) <- val
180400:00:33.024 PCI: attempt to write extended register: e6c (4) <- val
180500:00:33.024 PCI: attempt to write extended register: e70 (4) <- val
180600:00:33.024 PCI: attempt to write extended register: e74 (4) <- val
180700:00:33.024 PCI: attempt to write extended register: e78 (4) <- val
180800:00:33.024 PCI: attempt to write extended register: e7c (4) <- val
180900:00:33.024 PCI: attempt to write extended register: e80 (4) <- val
181000:00:33.024 PCI: attempt to write extended register: e84 (4) <- val
181100:00:33.024 PCI: attempt to write extended register: e88 (4) <- val
181200:00:33.024 PCI: attempt to write extended register: e8c (4) <- val
181300:00:33.024 PCI: attempt to write extended register: e90 (4) <- val
181400:00:33.024 PCI: attempt to write extended register: e94 (4) <- val
181500:00:33.024 PCI: attempt to write extended register: e98 (4) <- val
181600:00:33.024 PCI: attempt to write extended register: e9c (4) <- val
181700:00:33.024 PCI: attempt to write extended register: ea0 (4) <- val
181800:00:33.024 PCI: attempt to write extended register: ea4 (4) <- val
181900:00:33.024 PCI: attempt to write extended register: ea8 (4) <- val
182000:00:33.024 PCI: attempt to write extended register: eac (4) <- val
182100:00:33.024 PCI: attempt to write extended register: eb0 (4) <- val
182200:00:33.024 PCI: attempt to write extended register: eb4 (4) <- val
182300:00:33.024 PCI: attempt to write extended register: eb8 (4) <- val
182400:00:33.024 PCI: attempt to write extended register: ebc (4) <- val
182500:00:33.024 PCI: attempt to write extended register: ec0 (4) <- val
182600:00:33.024 PCI: attempt to write extended register: ec4 (4) <- val
182700:00:33.024 PCI: attempt to write extended register: ec8 (4) <- val
182800:00:33.024 PCI: attempt to write extended register: ecc (4) <- val
182900:00:33.024 PCI: attempt to write extended register: ed0 (4) <- val
183000:00:33.024 PCI: attempt to write extended register: ed4 (4) <- val
183100:00:33.024 PCI: attempt to write extended register: ed8 (4) <- val
183200:00:33.024 PCI: attempt to write extended register: edc (4) <- val
183300:00:33.024 PCI: attempt to write extended register: ee0 (4) <- val
183400:00:33.024 PCI: attempt to write extended register: ee4 (4) <- val
183500:00:33.024 PCI: attempt to write extended register: ee8 (4) <- val
183600:00:33.024 PCI: attempt to write extended register: eec (4) <- val
183700:00:33.024 PCI: attempt to write extended register: ef0 (4) <- val
183800:00:33.024 PCI: attempt to write extended register: ef4 (4) <- val
183900:00:33.024 PCI: attempt to write extended register: ef8 (4) <- val
184000:00:33.024 PCI: attempt to write extended register: efc (4) <- val
184100:00:33.024 PCI: attempt to write extended register: f00 (4) <- val
184200:00:33.024 PCI: attempt to write extended register: f04 (4) <- val
184300:00:33.024 PCI: attempt to write extended register: f08 (4) <- val
184400:00:33.024 PCI: attempt to write extended register: f0c (4) <- val
184500:00:33.024 PCI: attempt to write extended register: f10 (4) <- val
184600:00:33.024 PCI: attempt to write extended register: f14 (4) <- val
184700:00:33.024 PCI: attempt to write extended register: f18 (4) <- val
184800:00:33.024 PCI: attempt to write extended register: f1c (4) <- val
184900:00:33.024 PCI: attempt to write extended register: f20 (4) <- val
185000:00:33.024 PCI: attempt to write extended register: f24 (4) <- val
185100:00:33.024 PCI: attempt to write extended register: f28 (4) <- val
185200:00:33.024 PCI: attempt to write extended register: f2c (4) <- val
185300:00:33.024 PCI: attempt to write extended register: f30 (4) <- val
185400:00:33.024 PCI: attempt to write extended register: f34 (4) <- val
185500:00:33.024 PCI: attempt to write extended register: f38 (4) <- val
185600:00:33.024 PCI: attempt to write extended register: f3c (4) <- val
185700:00:33.024 PCI: attempt to write extended register: f40 (4) <- val
185800:00:33.024 PCI: attempt to write extended register: f44 (4) <- val
185900:00:33.024 PCI: attempt to write extended register: f48 (4) <- val
186000:00:33.024 PCI: attempt to write extended register: f4c (4) <- val
186100:00:33.024 PCI: attempt to write extended register: f50 (4) <- val
186200:00:33.024 PCI: attempt to write extended register: f54 (4) <- val
186300:00:33.024 PCI: attempt to write extended register: f58 (4) <- val
186400:00:33.024 PCI: attempt to write extended register: f5c (4) <- val
186500:00:33.024 PCI: attempt to write extended register: f60 (4) <- val
186600:00:33.024 PCI: attempt to write extended register: f64 (4) <- val
186700:00:33.024 PCI: attempt to write extended register: f68 (4) <- val
186800:00:33.024 PCI: attempt to write extended register: f6c (4) <- val
186900:00:33.024 PCI: attempt to write extended register: f70 (4) <- val
187000:00:33.024 PCI: attempt to write extended register: f74 (4) <- val
187100:00:33.024 PCI: attempt to write extended register: f78 (4) <- val
187200:00:33.024 PCI: attempt to write extended register: f7c (4) <- val
187300:00:33.024 PCI: attempt to write extended register: f80 (4) <- val
187400:00:33.024 PCI: attempt to write extended register: f84 (4) <- val
187500:00:33.024 PCI: attempt to write extended register: f88 (4) <- val
187600:00:33.024 PCI: attempt to write extended register: f8c (4) <- val
187700:00:33.024 PCI: attempt to write extended register: f90 (4) <- val
187800:00:33.024 PCI: attempt to write extended register: f94 (4) <- val
187900:00:33.024 PCI: attempt to write extended register: f98 (4) <- val
188000:00:33.024 PCI: attempt to write extended register: f9c (4) <- val
188100:00:33.024 PCI: attempt to write extended register: fa0 (4) <- val
188200:00:33.024 PCI: attempt to write extended register: fa4 (4) <- val
188300:00:33.024 PCI: attempt to write extended register: fa8 (4) <- val
188400:00:33.024 PCI: attempt to write extended register: fac (4) <- val
188500:00:33.024 PCI: attempt to write extended register: fb0 (4) <- val
188600:00:33.024 PCI: attempt to write extended register: fb4 (4) <- val
188700:00:33.024 PCI: attempt to write extended register: fb8 (4) <- val
188800:00:33.024 PCI: attempt to write extended register: fbc (4) <- val
188900:00:33.024 PCI: attempt to write extended register: fc0 (4) <- val
189000:00:33.024 PCI: attempt to write extended register: fc4 (4) <- val
189100:00:33.024 PCI: attempt to write extended register: fc8 (4) <- val
189200:00:33.025 PCI: attempt to write extended register: fcc (4) <- val
189300:00:33.025 PCI: attempt to write extended register: fd0 (4) <- val
189400:00:33.025 PCI: attempt to write extended register: fd4 (4) <- val
189500:00:33.025 PCI: attempt to write extended register: fd8 (4) <- val
189600:00:33.025 PCI: attempt to write extended register: fdc (4) <- val
189700:00:33.025 PCI: attempt to write extended register: fe0 (4) <- val
189800:00:33.025 PCI: attempt to write extended register: fe4 (4) <- val
189900:00:33.025 PCI: attempt to write extended register: fe8 (4) <- val
190000:00:33.025 PCI: attempt to write extended register: fec (4) <- val
190100:00:33.025 PCI: attempt to write extended register: ff0 (4) <- val
190200:00:33.025 PCI: attempt to write extended register: ff4 (4) <- val
190300:00:33.025 PCI: attempt to write extended register: ff8 (4) <- val
190400:00:33.025 PCI: attempt to write extended register: ffc (4) <- val
190500:00:33.025 PCI: attempt to write extended register: 100 (4) <- val
190600:00:33.025 PCI: attempt to write extended register: 104 (4) <- val
190700:00:33.025 PCI: attempt to write extended register: 108 (4) <- val
190800:00:33.025 PCI: attempt to write extended register: 10c (4) <- val
190900:00:33.025 PCI: attempt to write extended register: 110 (4) <- val
191000:00:33.025 PCI: attempt to write extended register: 114 (4) <- val
191100:00:33.025 PCI: attempt to write extended register: 118 (4) <- val
191200:00:33.025 PCI: attempt to write extended register: 11c (4) <- val
191300:00:33.025 PCI: attempt to write extended register: 120 (4) <- val
191400:00:33.025 PCI: attempt to write extended register: 124 (4) <- val
191500:00:33.025 PCI: attempt to write extended register: 128 (4) <- val
191600:00:33.025 PCI: attempt to write extended register: 12c (4) <- val
191700:00:33.025 PCI: attempt to write extended register: 130 (4) <- val
191800:00:33.025 PCI: attempt to write extended register: 134 (4) <- val
191900:00:33.025 PCI: attempt to write extended register: 138 (4) <- val
192000:00:33.025 PCI: attempt to write extended register: 13c (4) <- val
192100:00:33.025 PCI: attempt to write extended register: 140 (4) <- val
192200:00:33.025 PCI: attempt to write extended register: 144 (4) <- val
192300:00:33.025 PCI: attempt to write extended register: 148 (4) <- val
192400:00:33.025 PCI: attempt to write extended register: 14c (4) <- val
192500:00:33.025 PCI: attempt to write extended register: 150 (4) <- val
192600:00:33.025 PCI: attempt to write extended register: 154 (4) <- val
192700:00:33.025 PCI: attempt to write extended register: 158 (4) <- val
192800:00:33.025 PCI: attempt to write extended register: 15c (4) <- val
192900:00:33.025 PCI: attempt to write extended register: 160 (4) <- val
193000:00:33.025 PCI: attempt to write extended register: 164 (4) <- val
193100:00:33.025 PCI: attempt to write extended register: 168 (4) <- val
193200:00:33.025 PCI: attempt to write extended register: 16c (4) <- val
193300:00:33.025 PCI: attempt to write extended register: 170 (4) <- val
193400:00:33.025 PCI: attempt to write extended register: 174 (4) <- val
193500:00:33.025 PCI: attempt to write extended register: 178 (4) <- val
193600:00:33.025 PCI: attempt to write extended register: 17c (4) <- val
193700:00:33.025 PCI: attempt to write extended register: 180 (4) <- val
193800:00:33.025 PCI: attempt to write extended register: 184 (4) <- val
193900:00:33.025 PCI: attempt to write extended register: 188 (4) <- val
194000:00:33.025 PCI: attempt to write extended register: 18c (4) <- val
194100:00:33.025 PCI: attempt to write extended register: 190 (4) <- val
194200:00:33.025 PCI: attempt to write extended register: 194 (4) <- val
194300:00:33.025 PCI: attempt to write extended register: 198 (4) <- val
194400:00:33.025 PCI: attempt to write extended register: 19c (4) <- val
194500:00:33.025 PCI: attempt to write extended register: 1a0 (4) <- val
194600:00:33.025 PCI: attempt to write extended register: 1a4 (4) <- val
194700:00:33.025 PCI: attempt to write extended register: 1a8 (4) <- val
194800:00:33.025 PCI: attempt to write extended register: 1ac (4) <- val
194900:00:33.025 PCI: attempt to write extended register: 1b0 (4) <- val
195000:00:33.025 PCI: attempt to write extended register: 1b4 (4) <- val
195100:00:33.025 PCI: attempt to write extended register: 1b8 (4) <- val
195200:00:33.025 PCI: attempt to write extended register: 1bc (4) <- val
195300:00:33.025 PCI: attempt to write extended register: 1c0 (4) <- val
195400:00:33.025 PCI: attempt to write extended register: 1c4 (4) <- val
195500:00:33.025 PCI: attempt to write extended register: 1c8 (4) <- val
195600:00:33.025 PCI: attempt to write extended register: 1cc (4) <- val
195700:00:33.025 PCI: attempt to write extended register: 1d0 (4) <- val
195800:00:33.025 PCI: attempt to write extended register: 1d4 (4) <- val
195900:00:33.025 PCI: attempt to write extended register: 1d8 (4) <- val
196000:00:33.025 PCI: attempt to write extended register: 1dc (4) <- val
196100:00:33.025 PCI: attempt to write extended register: 1e0 (4) <- val
196200:00:33.025 PCI: attempt to write extended register: 1e4 (4) <- val
196300:00:33.025 PCI: attempt to write extended register: 1e8 (4) <- val
196400:00:33.025 PCI: attempt to write extended register: 1ec (4) <- val
196500:00:33.025 PCI: attempt to write extended register: 1f0 (4) <- val
196600:00:33.025 PCI: attempt to write extended register: 1f4 (4) <- val
196700:00:33.025 PCI: attempt to write extended register: 1f8 (4) <- val
196800:00:33.025 PCI: attempt to write extended register: 1fc (4) <- val
196900:00:33.025 PCI: attempt to write extended register: 200 (4) <- val
197000:00:33.025 PCI: attempt to write extended register: 204 (4) <- val
197100:00:33.025 PCI: attempt to write extended register: 208 (4) <- val
197200:00:33.025 PCI: attempt to write extended register: 20c (4) <- val
197300:00:33.025 PCI: attempt to write extended register: 210 (4) <- val
197400:00:33.025 PCI: attempt to write extended register: 214 (4) <- val
197500:00:33.025 PCI: attempt to write extended register: 218 (4) <- val
197600:00:33.025 PCI: attempt to write extended register: 21c (4) <- val
197700:00:33.025 PCI: attempt to write extended register: 220 (4) <- val
197800:00:33.025 PCI: attempt to write extended register: 224 (4) <- val
197900:00:33.025 PCI: attempt to write extended register: 228 (4) <- val
198000:00:33.025 PCI: attempt to write extended register: 22c (4) <- val
198100:00:33.025 PCI: attempt to write extended register: 230 (4) <- val
198200:00:33.025 PCI: attempt to write extended register: 234 (4) <- val
198300:00:33.025 PCI: attempt to write extended register: 238 (4) <- val
198400:00:33.025 PCI: attempt to write extended register: 23c (4) <- val
198500:00:33.025 PCI: attempt to write extended register: 240 (4) <- val
198600:00:33.025 PCI: attempt to write extended register: 244 (4) <- val
198700:00:33.025 PCI: attempt to write extended register: 248 (4) <- val
198800:00:33.025 PCI: attempt to write extended register: 24c (4) <- val
198900:00:33.025 PCI: attempt to write extended register: 250 (4) <- val
199000:00:33.025 PCI: attempt to write extended register: 254 (4) <- val
199100:00:33.025 PCI: attempt to write extended register: 258 (4) <- val
199200:00:33.025 PCI: attempt to write extended register: 25c (4) <- val
199300:00:33.025 PCI: attempt to write extended register: 260 (4) <- val
199400:00:33.025 PCI: attempt to write extended register: 264 (4) <- val
199500:00:33.025 PCI: attempt to write extended register: 268 (4) <- val
199600:00:33.025 PCI: attempt to write extended register: 26c (4) <- val
199700:00:33.025 PCI: attempt to write extended register: 270 (4) <- val
199800:00:33.025 PCI: attempt to write extended register: 274 (4) <- val
199900:00:33.025 PCI: attempt to write extended register: 278 (4) <- val
200000:00:33.025 PCI: attempt to write extended register: 27c (4) <- val

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